AMD EPYC 9334 (Genoa, 32-core, dual-socket, 12-channel DDR5 host CPU)

Fields

id

accelerators/amd-epyc-9334-genoa-dual

Vendor

amd

Architecture

Zen 4 (Genoa, SP5)

Release year

2022

Process (nm)

5

Form factors

Memory type

DDR5 RDIMM, 12 channels per socket (24 in 2P)

Memory bandwidth (GB/s)

921.6

Bandwidth basis

2 sockets x 12 channels x DDR5-4800 = 921.6 GB/s theoretical aggregate. IMPORTANT: NUMA splits this - the ~920 GB/s is NOT usable as one pool for a single model's decode. In practice a dual-socket Genoa delivers ~1.3-1.6x a single socket on 70B decode, not 2x, unless the model is spread evenly across both sockets' memory (ik_llama.cpp -numa distribute / RPC help).

TDP (W)

420

Unified memory

yes

Consumer part

no

notes

Dual-socket CPU-only inference host. Leaseweb 2026 bench measured DeepSeek-8B 27.8 tok/s and gpt-oss-20b Q4 ~26 tok/s on a 2x EPYC 9334. The NUMA caveat is the whole story for a 2P box: doubling channels does not double decode because the model straddles two memory domains. vram_gb null: capacity is DIMM-dependent. tdp_w is the 2-socket combined figure (210 W each) - system draw is higher. Record exists so the leaseweb benchmark's accelerator_ids resolve; this is a config, not a single chip.

Notes

Dual-socket CPU-only inference host. Leaseweb 2026 bench measured DeepSeek-8B 27.8 tok/s and gpt-oss-20b Q4 ~26 tok/s on a 2x EPYC 9334. The NUMA caveat is the whole story for a 2P box: doubling channels does not double decode because the model straddles two memory domains. vram_gb null: capacity is DIMM-dependent. tdp_w is the 2-socket combined figure (210 W each) - system draw is higher. Record exists so the leaseweb benchmark's accelerator_ids resolve; this is a config, not a single chip.

Cross-references

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