AMD EPYC 9454P (Genoa, 48-core, 12-channel DDR5 host CPU)

Fields

id

accelerators/amd-epyc-9454p-genoa

Vendor

amd

Architecture

Zen 4 (Genoa, SP5)

Release year

2022

Process (nm)

5

Form factors

Memory type

DDR5 RDIMM, 12 channels

Memory bandwidth (GB/s)

460.8

Bandwidth basis

12 channels x DDR5-4800 = 460.8 GB/s theoretical peak per socket (AMD Genoa platform spec). Same memory subsystem as EPYC 9554; fewer cores (48 vs 64) but decode is bandwidth-bound, not core-bound.

TDP (W)

290

Unified memory

yes

Consumer part

no

notes

CPU-only inference host. Measured by runaihome / llama.cpp discussion #19480: Qwen3-MoE-30B (~3B active) 63.1 tok/s, Qwen3-Next-80B (~3B active) 11.76 tok/s. The strong MoE result is the point: with only ~3B active params per token the ~460 GB/s bandwidth is no longer the binding constraint the way it is for a dense 70B. Channel population is critical (see gotcha-cpu-inference-must-populate-all-memory-channels). vram_gb null: capacity is DIMM-dependent, not fixed.

Notes

CPU-only inference host. Measured by runaihome / llama.cpp discussion #19480: Qwen3-MoE-30B (~3B active) 63.1 tok/s, Qwen3-Next-80B (~3B active) 11.76 tok/s. The strong MoE result is the point: with only ~3B active params per token the ~460 GB/s bandwidth is no longer the binding constraint the way it is for a dense 70B. Channel population is critical (see gotcha-cpu-inference-must-populate-all-memory-channels). vram_gb null: capacity is DIMM-dependent, not fixed.

Cross-references

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