verifiedhigh · 0.93updated 2026-10-03

NVIDIA GeForce RTX 5080

nvidia blackwell (GB203) 2025

Fields

accelerators/nvidia-rtx-5080

Vendor

nvidia

Architecture

blackwell (GB203)

Release year

2025

Process (nm)

Form factors

VRAM (GB)

Memory type

gddr7

Memory bus (bit)

256

Memory bandwidth (GB/s)

960

Bandwidth basis

GDDR7 30 Gbps data rate x 256-bit / 8 = 960 GB/s (NVIDIA RTX Blackwell whitepaper: 'Memory Clock (Data Rate) 30 Gbps', 'Memory Bandwidth 960 GB/sec'; the same figure and bus appear on the NVIDIA GeForce comparison table)

Peak FLOPS

precisionfp32tflops56.3denseyesvendor_claimyessource_idconsumer-nvidia-rtx-blackwell-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own fp32 for NVIDIA GeForce RTX 5080 (source of record: 'NVIDIA RTX Blackwell GPU Architecture whitepaper (GeForce RTX 50 series)', kind: whitepaper). Recorded dense:true as printed.precisionfp16tflops112.6denseyesvendor_claimyessource_idconsumer-nvidia-rtx-blackwell-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own fp16 for NVIDIA GeForce RTX 5080 (source of record: 'NVIDIA RTX Blackwell GPU Architecture whitepaper (GeForce RTX 50 series)', kind: whitepaper). Recorded dense:true as printed.precisionbf16tflops112.6denseyesvendor_claimyessource_idconsumer-nvidia-rtx-blackwell-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own bf16 for NVIDIA GeForce RTX 5080 (source of record: 'NVIDIA RTX Blackwell GPU Architecture whitepaper (GeForce RTX 50 series)', kind: whitepaper). Recorded dense:true as printed.precisiontf32tflops56.3denseyesvendor_claimyessource_idconsumer-nvidia-rtx-blackwell-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own tf32 for NVIDIA GeForce RTX 5080 (source of record: 'NVIDIA RTX Blackwell GPU Architecture whitepaper (GeForce RTX 50 series)', kind: whitepaper). Recorded dense:true as printed.precisionfp8tflops450.2denseyesvendor_claimyessource_idconsumer-nvidia-rtx-blackwell-gpu-architecture-whitepapernotesCORRECTED 2026-10-03: was 225.1, which was the wrong half of the wrong row. NVIDIA's GB203 appendix Table 4 prints for the RTX 5080 two distinct FP8 rows - 'Peak FP8 Tensor TFLOPS with FP16 Accumulate 450.2/900.42' and 'Peak FP8 Tensor TFLOPS with FP32 Accumulate 225.1/450.22'. This record stored 225.1 as dense:false and 900.4 as dense:false: the first number 225.1 is actually the DENSE value of the FP32-accumulate row (a real, lower rate - FP8 with FP32 accumulate is half the FP8-with-FP16-accumulate rate on this architecture), not the sparse value of the FP16-accumulate row. Mixing the two rows in one precision produced a record in which the 'sparse' figure was BELOW the card's dense FP8 rate, which is self-evidently wrong. Corrected to the dense value of the FP16-accumulate row, 450.2, with the sparse twin 900.4 kept as the separate dense:false row - matching the convention NVIDIA uses on its own sheet ('450.2/900.42'). The FP32-accumulate variant (225.1 dense / 450.2 sparse) is a genuinely different rate and is NOT recorded here, because the schema has no accumulate-mode field and silently mixing the two modes under one 'fp8' key is what caused the error.basisvendor-whitepaperbasis_detailTranscribed from the vendor's own fp8 for NVIDIA GeForce RTX 5080 (source of record: 'NVIDIA RTX Blackwell GPU Architecture whitepaper (GeForce RTX 50 series)', kind: whitepaper). Recorded dense:true as printed. Full reasoning for this row retained verbatim in notes.precisionfp8tflops900.4densenovendor_claimyessource_idconsumer-nvidia-rtx-blackwell-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own fp8 for NVIDIA GeForce RTX 5080 (source of record: 'NVIDIA RTX Blackwell GPU Architecture whitepaper (GeForce RTX 50 series)', kind: whitepaper). Recorded dense:false - the vendor prints this as a structured-sparsity figure; the dense companion row on this record is the halved value. See this record's notes for the sparsity-footnote rule.precisionfp4tflops900.4denseyesvendor_claimyessource_idconsumer-nvidia-rtx-blackwell-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own fp4 for NVIDIA GeForce RTX 5080 (source of record: 'NVIDIA RTX Blackwell GPU Architecture whitepaper (GeForce RTX 50 series)', kind: whitepaper). Recorded dense:true as printed.precisionfp4tflops1,801densenovendor_claimyessource_idconsumer-nvidia-rtx-blackwell-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own fp4 for NVIDIA GeForce RTX 5080 (source of record: 'NVIDIA RTX Blackwell GPU Architecture whitepaper (GeForce RTX 50 series)', kind: whitepaper). Recorded dense:false - the vendor prints this as a structured-sparsity figure; the dense companion row on this record is the halved value. See this record's notes for the sparsity-footnote rule.precisionint8tflops450.2denseyesvendor_claimyessource_idconsumer-nvidia-rtx-blackwell-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own int8 for NVIDIA GeForce RTX 5080 (source of record: 'NVIDIA RTX Blackwell GPU Architecture whitepaper (GeForce RTX 50 series)', kind: whitepaper). Recorded dense:true as printed.

TDP (W)

360

Unified memory

Consumer part

yes

notes

CORRECTED 2026-10-03: the dense FP8 row was 225.1, which is NVIDIA's 'FP8 with FP32 Accumulate' DENSE rate, not a sparse value - the row was mislabelled dense:false AND drew from the wrong of the two FP8 rows NVIDIA publishes. It is now 450.2 dense with 900.4 dense:false as its sparse twin, which is exactly the '450.2/900.42' pair on NVIDIA's GB203 appendix Table 4. See that row's notes for the full explanation and for why the FP32-accumulate variant is deliberately not recorded. AUDIT 2026-10-03 (NVIDIA dense/sparse convention re-verified from the primary whitepaper PDF, no values changed): NVIDIA's GeForce RTX Blackwell architecture whitepaper (source consumer-nvidia-rtx-blackwell-gpu-architecture-whitepaper, images.nvidia.com/aem-dam/Solutions/geforce/blackwell/) prints every tensor row in the form 'DENSE/SPARSE' and defines the second number in a single footnote that is identical on every appendix page: 'Effective TOPS / TFLOPS using the Sparsity Feature'. Every 'Peak ... Tensor TFLOPS' and 'Peak INT8 Tensor TOPS' row on the sheet therefore carries that marker, while the 'non-Tensor' rows (FP32/FP16/BF16 non-tensor, Peak INT32 TOPS non-Tensor) and the RT TFLOPS row do NOT. Each sparse row was re-checked against that sheet page by page and every dense:false row on this record corresponds to a printed second number, with its dense twin present as a separate dense:true row. Note the sheet's own footnote 1, 'Peak rates are based on GPU Boost Clock' - these are boost-clock peaks, not sustained, and not measured. GB203 appendix, Table 4 'GeForce RTX 5080 vs GeForce RTX 4080 vs GeForce RTX 3080 Specs' (PDF page 49): 'Peak FP4 Tensor TFLOPS with FP32 Accumulate (FP4 AI TOPS) 900.4/1801', 'Peak FP8 Tensor TFLOPS with FP16 Accumulate 450.2/900.42', 'Peak FP8 Tensor TFLOPS with FP32 Accumulate 225.1/450.22', 'Peak FP16 Tensor TFLOPS with FP32 Accumulate 112.6/225.12', 'Peak TF32 Tensor TFLOPS 56.3/112.62', 'Peak INT8 Tensor TOPS 450.2/900.42'. fp8 900.4 and fp4 1801 stored here as dense:false are the sparse column; the dense twins 450.2 and 900.4 are stored separately. The same table also independently prints this card's memory row - 'Frame Buffer Memory Size and Type 16 GB GDDR7', 'Memory Interface 256-bit', 'Memory Clock (Data Rate) 30 Gbps', 'Memory Bandwidth 960 GB/sec' - which is where the 960 GB/s and 30 Gbps/pin in this record come from, and it reconciles exactly (256 x 30 / 8 = 960). Mid-rung Blackwell consumer part, 10752 CUDA cores, 2617 MHz boost, 360 W TGP, PCIe Gen5, 65536 KB L2, 2.62 GHz boost clock on the NVIDIA comparison table. PRECISION CAVEAT - the single most conflated number on consumer hardware. NVIDIA's product pages advertise 'AI TOPS' (5090: 3352, 5080: 1801, 5070 Ti: 1406). The RTX Blackwell whitepaper labels the identical figure 'Peak FP4 Tensor TFLOPS with FP32 Accumulate (FP4 AI TOPS) 1676/3352', where the second value uses the 2:4 structured-sparsity feature (footnote 2: 'Effective TOPS / TFLOPS using the Sparsity Feature'). So the marketing 'AI TOPS' number is FP4 with 2:4 sparsity, not INT4, not FP16, and not dense. It is not comparable to an FP16/BF16 dense figure, to the INT4-vs-FP16 speedup ratios quoted in quantization literature, or to another vendor's dense INT8 number. Only figures NVIDIA publishes with an explicit dense/sparse split are recorded here; every flops entry's dense flag states which half it is. Inference: 16 GB at 960 GB/s. Bandwidth is strong for the tier; capacity is what limits it. A 16 GB pool quantised leaves almost no headroom for KV cache at long context, where a 24 GB card fits the same model comfortably. Do not rank this part against the 5090 on the 'AI TOPS' ratio - 1801 vs 3352 are both FP4+sparse, and the dense ratio (900.4 vs 1676) is the same 2x, so the marketing ratio is at least self-consistent, but neither is an FP16 number. ACCUMULATE-MODE DISAMBIGUATION (why there is only one fp16/fp8 entry each): NVIDIA's whitepapers print separate tensor rows per accumulate mode, and the same numeric value can appear as DENSE in one row and SPARSE in another. E.g. on the 4090 'Peak FP16 Tensor TFLOPS with FP16 Accumulate 330.3/660.6' and 'Peak FP16 Tensor TFLOPS with FP32 Accumulate 165.2/330.4' - so 330.3 is DENSE-with-FP16-accumulate and SPARSE-with-FP32-accumulate. Encoding that as a single dense:false entry would be wrong. The flops array here therefore records ONE entry per precision, always the FP32-accumulate figure, because that is what LLM inference kernels use; the FP16-accumulate variants are stated in this note instead of being mislabeled as sparse. 5080 FP16-accumulate variants: fp16 dense 225.1 / sparse 450.2 TFLOPS; fp8 (fp16 accumulate) dense 450.2 / sparse 900.4 TFLOPS. The recorded fp16 112.6 and fp8 225.1 entries are both FP32-accumulate dense. INTERCONNECT FILLED 2026-10-04: interconnect was empty; it now reads ['pcie-gen5'], from the vendor's own spec table (source the GeForce RTX 5080 product page's 'Technology Support' row). SCALE-UP IS ABSENT AND THAT IS THE POINT: this part has no NVLink and no other GPU-to-GPU fabric, so the host link is the ONLY interconnect a multi-GPU deployment has. Do not infer a fabric from the presence of a PCIe value, and do not read the Gen number as a multi-GPU capability.

Notes

PRECISION CAVEAT - the single most conflated number on consumer hardware. NVIDIA's product pages advertise 'AI TOPS' (5090: 3352, 5080: 1801, 5070 Ti: 1406). The RTX Blackwell whitepaper labels the identical figure 'Peak FP4 Tensor TFLOPS with FP32 Accumulate (FP4 AI TOPS) 1676/3352', where the second value uses the 2:4 structured-sparsity feature (footnote 2: 'Effective TOPS / TFLOPS using the Sparsity Feature'). So the marketing 'AI TOPS' number is FP4 with 2:4 sparsity, not INT4, not FP16, and not dense. It is not comparable to an FP16/BF16 dense figure, to the INT4-vs-FP16 speedup ratios quoted in quantization literature, or to another vendor's dense INT8 number. Only figures NVIDIA publishes with an explicit dense/sparse split are recorded here; every flops entry's dense flag states which half it is.

Inference: 16 GB at 960 GB/s. Bandwidth is strong for the tier; capacity is what limits it. A 16 GB pool quantised leaves almost no headroom for KV cache at long context, where a 24 GB card fits the same model comfortably. Do not rank this part against the 5090 on the 'AI TOPS' ratio - 1801 vs 3352 are both FP4+sparse, and the dense ratio (900.4 vs 1676) is the same 2x, so the marketing ratio is at least self-consistent, but neither is an FP16 number.

ACCUMULATE-MODE DISAMBIGUATION (why there is only one fp16/fp8 entry each): NVIDIA's whitepapers print separate tensor rows per accumulate mode, and the same numeric value can appear as DENSE in one row and SPARSE in another. E.g. on the 4090 'Peak FP16 Tensor TFLOPS with FP16 Accumulate 330.3/660.6' and 'Peak FP16 Tensor TFLOPS with FP32 Accumulate 165.2/330.4' - so 330.3 is DENSE-with-FP16-accumulate and SPARSE-with-FP32-accumulate. Encoding that as a single dense:false entry would be wrong. The flops array here therefore records ONE entry per precision, always the FP32-accumulate figure, because that is what LLM inference kernels use; the FP16-accumulate variants are stated in this note instead of being mislabeled as sparse. 5080 FP16-accumulate variants: fp16 dense 225.1 / sparse 450.2 TFLOPS; fp8 (fp16 accumulate) dense 450.2 / sparse 900.4 TFLOPS. The recorded fp16 112.6 and fp8 225.1 entries are both FP32-accumulate dense. INTERCONNECT FILLED 2026-10-04: interconnect was empty; it now reads ['pcie-gen5'], from the vendor's own spec table (source the GeForce RTX 5080 product page's 'Technology Support' row). SCALE-UP IS ABSENT AND THAT IS THE POINT: this part has no NVLink and no other GPU-to-GPU fabric, so the host link is the ONLY interconnect a multi-GPU deployment has. Do not infer a fabric from the presence of a PCIe value, and do not read the Gen number as a multi-GPU capability.

Cross-references

Interconnect (1)

InterconnectPCI Express 5.0