id
accelerators/nvidia-rtx-pro-6000-blackwell
Architecture
blackwell (GB202)
Memory type
gddr7 with ECC
Memory bandwidth (GB/s)
1,792
Bandwidth basis
Datasheet spec table prints 'Memory interface 512-bit' and 'Memory bandwidth 1792 GB/s' directly (derived: 28 Gbps GDDR7 x 512-bit / 8). Identical bus and bandwidth to the GeForce RTX 5090, but 3x the capacity and with ECC.
Peak FLOPS
precisionfp32tflops125denseyesvendor_claimyessource_idconsumer-nvidia-rtx-pro-6000-blackwell-datasheetbasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own fp32 for NVIDIA RTX PRO 6000 Blackwell Workstation Edition (source of record: 'NVIDIA RTX PRO 6000 Blackwell Workstation Edition datasheet', kind: spec-sheet). Recorded dense:true as printed.precisionfp4tflops4,000densenovendor_claimyessource_idconsumer-nvidia-rtx-pro-6000-blackwell-datasheetnotesAUDIT 2026-10-04 RE-VERIFIED AGAINST THE NVIDIA-HOSTED PDF, flag confirmed correct, no value changed. NVIDIA's own datasheet (a nvidia.com-hosted copy, unlike the Blackwell datacenter sheets) prints 'AI TOPS 4000 AI TOPS 1,2' in the spec table with footnote 1 'Peak rates based on GPU Boost Clock.' and footnote 2 'Effective FP4 TOPS with sparsity.' The product page carries the same footnote 2 as 'Theoretical FP4 TOPS using sparsity'. So 4,000 is the SPARSE figure and dense FP4 is 2,000: this row is correctly flagged dense:false, and any reader who halves it gets the dense number right. This is the opposite orientation of the bug class that corrupted this repo before (a correct DENSE figure flagged dense:false, which makes a reader halve something already correct). Note there is no printed dense twin to record, unlike the GeForce whitepapers' 'dense/sparse' pairs - and NVIDIA publishes no FP16/BF16/FP8/INT8 figure for this part at all, so do not manufacture them from the GeForce tables. The fp32 125 row was also re-verified: the spec table prints 'Single-Precision Performance 126 TFLOPS' on the current (JUN26) revision of the PDF while the product page highlights '125 TFLOPS'. The stored 125 matches the product page; 126 on the datasheet is a 1-unit revision difference, left as-is and recorded here rather than churned, since it is within the rounding of a boost-clock peak either way.basisvendor-spec-sheetbasis_detailTranscribed from the vendor's own fp4 for NVIDIA RTX PRO 6000 Blackwell Workstation Edition (source of record: 'NVIDIA RTX PRO 6000 Blackwell Workstation Edition datasheet', kind: spec-sheet). Recorded dense:false - the vendor prints this as a structured-sparsity figure; the dense companion row on this record is the halved value. See this record's notes for the sparsity-footnote rule. Full reasoning for this row retained verbatim in notes.
notes
AUDIT 2026-10-04: re-verified every field against NVIDIA's own datasheet PDF and product page. vram_gb 96, memory_bus_bit 512, memory_bandwidth_gbps 1792, tdp_w 600 and the 24,064 CUDA cores all match the spec table verbatim. Arithmetic check: 28 Gbps GDDR7 x 512-bit / 8 = 1,792 GB/s, consistent with the printed aggregate. The FP4 4000 dense:false flag is CORRECT and was the specific thing checked - NVIDIA footnotes it 'Effective FP4 TOPS with sparsity', so 4,000 is sparse and dense is 2,000. ONE RESIDUAL DISCREPANCY, left unresolved rather than silently picked: the datasheet spec table prints 'Single-Precision Performance 126 TFLOPS' while the product page highlights '125 TFLOPS' and the stored value is 125. Both are boost-clock peaks (footnote 1, 'Peak rates based on GPU Boost Clock') and the datasheet edition is newer (JUN26); the 1-unit gap is a vendor revision, not a transcription error. Status held at verified because the discrepancy is immaterial to every downstream use, and recorded here so a reader can see it was seen. Not padded: NVIDIA publishes no FP16/BF16/FP8/INT8 tensor figures for this part, so there is nothing else to store. SCALE-UP IS PCIe ONLY - no NVLink; see gotcha mgpu-pcie-only-multigpu-is-communication-bound for the measured consequence on this exact part (8x RTX PRO 6000 capped at ~7K tok/s on DeepSeek-V4.1-Flash at 87% GPU utilization but only 220 W of a 600 W cap). ECC on 96 GB of GDDR7 is the durable differentiator versus the GeForce RTX 5090, which shares the same 512-bit bus and 1,792 GB/s but has no ECC.
INTERCONNECT FILLED 2026-10-04: interconnect was empty; it now reads ['pcie-gen5'], from the vendor's own spec table (source NVIDIA doc 3519208's spec-table 'System interface' row). SCALE-UP IS ABSENT AND THAT IS THE POINT: this part has no NVLink and no other GPU-to-GPU fabric, so the host link is the ONLY interconnect a multi-GPU deployment has. Do not infer a fabric from the presence of a PCIe value, and do not read the Gen number as a multi-GPU capability.