inference/research
verifiedhigh · 0.85updated 2026-10-11

SiMa.ai MLSoC Modalix

asic-other MLSoC (Machine Learning System-on-Chip) 2023

Fields

id
accelerators/simaai-mlsoc
Vendor
asic-other
Architecture
MLSoC (Machine Learning System-on-Chip)
Release year
2023
Form factors
socspcie
Peak FLOPS
precisionint8tflops50denseyesvendor_claimyessource_idsima-ai-mlsoc-product-pagebasisvendor-spec-sheetbasis_detailSiMa.ai MLSoC product page states '50 TOPS of multimodal AI at sub-10W. BF16 / INT8 / INT16'. INT8 peak compute recorded as 50 TOPS.unit—precisionbf16tflops50denseyesvendor_claimyessource_idsima-ai-mlsoc-product-pagebasisvendor-spec-sheetbasis_detailSiMa.ai MLSoC product page states '50 TOPS of multimodal AI at sub-10W. BF16 / INT8 / INT16'. BF16 compute recorded as 50 TFLOPS.unit—
TDP (W)
10
Unified memory
no
Consumer part
no
notes
REAL VENDOR: SiMa.ai (San Jose, CA). Set to 'asic-other' because the schema enum does not include 'simaai'. The MLSoC (Modalix) is a purpose-built heterogeneous system-on-chip for edge physical AI, robotics, and smart vision. SiMa.ai publishes 50 TOPS multimodal compute across BF16, INT8, and INT16 datatypes at sub-10W power. Available as a production-ready SoM (pin-compatible with NVIDIA Jetson Orin NX and Nano carrier boards) and as an HHHL PCIe Gen5 x8 card. Software compilation and deployment are handled by SiMa.ai's Palette Neat agentic development environment, which imports ONNX, TensorFlow (LiteRT), and PyTorch models.\nMEMORY FIGURES: STILL NULL, AND HERE IS PRECISELY WHAT WAS LOOKED FOR (2026-10-11). The vendor product page does not publish LPDDR memory capacity, bus width, or memory bandwidth for the standalone MLSoC silicon. While DevKit carrier bundles include 500GB NVMe storage, DRAM bandwidth is not disclosed on the product specification page. No memory figures were guessed or back-computed.

Notes

REAL VENDOR: SiMa.ai (San Jose, CA). Set to 'asic-other' because the schema enum does not include 'simaai'. The MLSoC (Modalix) is a purpose-built heterogeneous system-on-chip for edge physical AI, robotics, and smart vision. SiMa.ai publishes 50 TOPS multimodal compute across BF16, INT8, and INT16 datatypes at sub-10W power. Available as a production-ready SoM (pin-compatible with NVIDIA Jetson Orin NX and Nano carrier boards) and as an HHHL PCIe Gen5 x8 card. Software compilation and deployment are handled by SiMa.ai's Palette Neat agentic development environment, which imports ONNX, TensorFlow (LiteRT), and PyTorch models.\nMEMORY FIGURES: STILL NULL, AND HERE IS PRECISELY WHAT WAS LOOKED FOR (2026-10-11). The vendor product page does not publish LPDDR memory capacity, bus width, or memory bandwidth for the standalone MLSoC silicon. While DevKit carrier bundles include 500GB NVMe storage, DRAM bandwidth is not disclosed on the product specification page. No memory figures were guessed or back-computed.

Cross-references

Interconnect (1)