Tenstorrent Blackhole Tensix (p100a / p150a / p150b)

Vendor table states 512 GB/s for p150a/p150b with 32 GB GDDR6 at 16 GT/sec on a 256-bit bus, and 448 GB/s for the 28 GB p100a. 256-bit x 16 GT/s / 8 = 512 GB/s, so the stated figure is consistent with the bus width.

Per p150 card (1 Blackhole ASIC, 120 Tensix cores, 16 SiFive x280 'big RISC-V' cores, 180 MB SRAM, 32 GB GDDR6, 300 W, PCIe 5.0 x16, 75 W idle). Only BLOCKFP8 is published as a throughput figure (664 TFLOPS); FP16, BF16 and FP32 TFLOPS are not given, so they are omitted. Note the block-float qualifier: this is BLOCKFP8 (block-scaled FP8), not plain FP8, and the two are not interchangeable for roofline work. The architectural change from Wormhole is that capacity and bandwidth roughly doubled per card (12 -> 32 GB, 288 -> 512 GB/s) while SRAM grew 108 -> 180 MB, and scale-up moved from 200G QSFP-DD to four passive 800G QSFP-DD ports. [CORRECTED 2026-10-05 - see the ROOFLINE FRAMING section below. The original sentence computed '1297 FLOP/byte on BLOCKFP8' and concluded Blackhole is 'much closer to compute-bound' - the same category error as on the Wormhole record, applied to a part whose fields are all correct.] The part-level facts that survive the correction, without roofline vocabulary: capacity and bandwidth roughly doubled per card from Wormhole (12 -> 32 GB, 288 -> 512 GB/s) while SRAM grew 108 -> 180 MB, so batch-1 decode streams a much smaller fraction of its weight set from GDDR6 than Wormhole does; and 512 GB/s remains a cost-led GDDR6 choice rather than an HBM one. GDDR6 rather than HBM is a deliberate cost choice: it puts these cards in the desktop price band (p150 ~USD 1400, p100a ~USD 999). Process node is not published. Variant differences: p100a has 28 GB / 448 GB/s / no QSFP-DD; p150b is the passively cooled rack version of the p150a. OPEN-SOURCE SOFTWARE STACK: Same as Wormhole — TT-Forge (MLIR-based compiler), TT-NN (operator library), TT-Metalium (low-level kernel model). All open-source on GitHub. === ROOFLINE FRAMING CORRECTED 2026-10-05 (non-GPU classification audit, w7-nonxpu-computers). === SAME DEFECT AS THE WORMHOLE RECORD, AND IT HAD A SECOND COMPONENT THIS TIME. No field on this record is wrong: 32 GB GDDR6 on a 256-bit bus at 512 GB/s is all true and all correctly GPU-shaped, because this part does have an off-package DRAM tier behind a real bus. Two sentences of interpretation were corrected in place above. WHAT WAS WRONG, PART ONE: 'Compute-to-byte is 1297 FLOP/byte on BLOCKFP8, so Blackhole is much closer to compute-bound than Wormhole, but at 512 GB/s it is still memory-bound for batch-1 decode.' A compute-to-byte ratio is a machine's balance point and says nothing about what a workload does on this part. Data placement here is decided at compile time by TT-Forge across a RISC-V NoC with dedicated control cores, and the 180 MB on-die SRAM is an L2-like feed tier that serves a compile-time-determined working set. 'Much closer to compute-bound' describes an arithmetic ratio, not a regime the part occupies. WHAT WAS WRONG, PART TWO, AND IT IS THE WORSE HALF: 'at 512 GB/s it is still memory-bound for batch-1 decode' is stated as a LIMITATION, and it is not. It is a deliberate cost decision, and the record's own next sentence says so - 'GDDR6 rather than HBM is a deliberate cost choice: it puts these cards in the desktop price band (p150 ~USD 1400, p100a ~USD 999)'. A roofline framing converts a design choice into a deficiency, which inverts the part's actual positioning. This is the same inversion the sibling Wormhole record suffered from with the word 'decisively'. WHAT REPLACES IT: the honest comparative claim is about weight-streaming traffic per token, not about a roofline position. Going from Wormhole to Blackhole, bandwidth per card rose 1.78x while capacity rose 2.67x and SRAM rose 1.67x, so the fraction of a resident model's weights that must cross GDDR6 per decode token FALLS, and that - not a move toward a compute-bound corner - is why Blackhole is the more capable inference part of the two. A reader comparing these cards should compare weight-streaming traffic and power at a fixed latency target. No arithmetic-intensity figure is asserted anywhere in this record as a result of this correction. THE BLOCKFP8 QUALIFIER IN THE SURVIVING SENTENCE IS LOAD-BEARING AND WAS ALREADY RIGHT: this is block-scaled FP8, not plain FP8, and the two are not interchangeable - which is exactly why a compute-to-byte ratio computed over BLOCKFP8 could not be compared against any ratio computed over plain FP8 on another vendor's part anyway. The record's existing warning that the two are 'not interchangeable for roofline work' is retained and is the right instinct; what was removed is the ratio itself. NO FIELD WAS CHANGED ON THIS RECORD. As on the Wormhole record, the audit finding here is an error in interpretation only, and the correct response to that is to correct the prose and leave every number alone. === RE-VERIFIED 2026-10-08 (w8-reverify) — THE WAVE-7 JUDGMENT TO CHANGE NO NUMBER IS CORRECT. === The wave-7 non-GPU audit reported deliberately changing no figure on this record, on the grounds that every field is correct and any change would introduce an error. That judgment was re-tested against the live vendor card-comparison table at docs.tenstorrent.com (fetched 2026-10-08), figure by figure: vram_gb 12 / gddr6 / memory_bus_bit 192 / memory_bandwidth_gbps 288 / tdp_w 160 / fp16 74 / fp8 262 / bf16 74 / sram_mb 108 / process_nm 12 / interconnect pcie-gen4 + warp100 + qsfp-dd. Every one matches the vendor table exactly, and the two arithmetical fields close on the vendor's own inputs: 192-bit x 12 GT/s / 8 = 288 GB/s. Two consequences recorded rather than quietly kept: (1) the wave-7 correction of the roofline PROSE was the right kind of fix - it changed an interpretation, not a number, and the number it interpreted was right; (2) the sram_mb 108-vs-120 conflict this record already flags is now confirmed live as a two-page disagreement inside Tenstorrent's own docs (the card table says 108 MB, the overview sentence on the same page says 120 MB / 1.5 MB per core), so leaving 108 in place with the conflict documented is still the correct handling and not an oversight. NO FIELD CHANGED VALUE. For this record the live table confirms: Tensix cores 120, Big RISC-V cores 16, SRAM 180 MB, 32 GB GDDR6 on a 256-bit bus at 16 GT/sec, 512 GB/s, BLOCKFP8 664 TFLOPS, TBP 300 W, idle 75 W, PCIe 5.0 x16, 4x QSFP-DD 800G passive. All match. The warm-path derivation 256-bit x 16 GT/s / 8 = 512 GB/s closes exactly, so the record's stated basis is independently confirmed, not merely asserted. The p100a variant difference (28 GB / 448 GB/s / no QSFP-DD) is also confirmed live.