Strix Halo 8060S (Vulkan AMDVLK (2025.Q2.1)) Qwen3-30B-A3B UD-Q4_K_XL: pp512 at depth 65536
280.57 tok/s (pp512 at primed depth, per-request batch-1, 5-run average)
Fields
id
benchmarks/wiki-strix-8060s-qwen3-30b-a3b-udq4-amdvlk-pp512-d64kMetric
prefill_tok_s
Value
280.57
Unit
tok/s (pp512 at primed depth, per-request batch-1, 5-run average)
Model
Qwen3-30B-A3B (MoE, ~3B active)
Methodology
THIRD-PARTY MEASURED (Strix Halo HomeLab wiki llama.cpp performance page, lhl, re-fetched 2026-10-16). Hardware: Framework Desktop, AMD Ryzen AI Max+ 395 (Strix Halo) + Radeon 8060S iGPU (gfx1151), 128GB LPDDR5x unified memory. Model: unsloth Qwen3-30B-A3B-UD-Q4_K_XL.gguf. Backend: Vulkan AMDVLK (2025.Q2.1). llama-bench -fa 1 --mmap 0 -ngl 999 -ub 512 -d 65536, five repeats, average tok/s. prompt-processing (pp512) measured at primed context depth 65536; per-request batch-1, not aggregate across concurrent requests. The wiki's zero-depth HIP tg128 (130.33) is the same shape as, but a different run from, the short-context HIP rocWMMA summary (58.5 tg128) already recorded in strix-halo-8060s-qwen3-30b-a3b-udq4-hip-tg128 — different llama.cpp build and backend flags, so both are kept.
Measured by
third_party
Reproducible
yes
Thermal state
unknown
notes
Long-context point on a 35B-class MoE that fits comfortably in Strix Halo's unified memory. Decode is per-request batch-1; the curve falls with depth because KV grows, not because the weights spill.
Notes
Long-context point on a 35B-class MoE that fits comfortably in Strix Halo's unified memory. Decode is per-request batch-1; the curve falls with depth because KV grows, not because the weights spill.