inference/research
verifiedhigh · 0.95updated 2026-10-10

NVIDIA A100 Tensor Core GPU Architecture white paper (Ampere) - Table 4 Comparison of NVIDIA Data Center GPUs

whitepaper

Fields

id
sources/a100canon-acc-fill-nvidia-ampere-whitepaper-a100-40gb
Publisher
NVIDIA
Kind
whitepaper
Published
2020-05
Accessed
2026-10-03
notes
Capacity-unstated A100 copy of [[sources/acc-fill-nvidia-ampere-whitepaper-a100-40gb]], added 2026-10-10 for [[accelerators/nvidia-a100-sxm]]. SAME DOCUMENT, SAME URL: a second source id is minted rather than the record reusing the 40 GB one, because this source is cited by the capacity-unstated accelerator and the source id is the audit trail from a figure back to the document that printed it. Vendor primary architecture document. Its Table 4 is a single 'NVIDIA A100' column, and that is exactly why it can back the capacity-unstated record's CAPACITY-INDEPENDENT figures: 'Memory Interface 5120-bit HBM2', 'GPU Boost Clock 1410 MHz', 'TDP 400 Watts', 'SMs 108', 'FP32 Cores / GPU 6912', 'FP64 Cores / GPU (excl. Tensor) 3456', 'Peak FP64 TFLOPS (non-Tensor) 9.7', 'Peak FP64 Tensor TFLOPS 19.5', 'Peak FP32 TFLOPS (non-Tensor) 19.5', 'Peak FP16 Tensor TFLOPS 312/624', 'Peak BF16 Tensor TFLOPS 312/624', 'Peak TF32 Tensor TFLOPS 156/312', 'Peak INT8 Tensor TOPS 624/1248', 'Peak INT4 Tensor TOPS 1248/2496', 'Transistors 54.2 billion', 'TSMC Manufacturing Process 7 nm N7'. The slash notation in the tensor rows is dense/sparse, so the DENSE value is the first number of each pair. Table 4 also carries the 40 GB memory rows ('Memory Size 40 GB', 'Memory Data Rate 1215 MHz DDR', 'Memory Bandwidth 1555 GB/sec') which the capacity-unstated record deliberately does NOT use. URL verified live and served as application/pdf on 2026-10-03.

Notes

Capacity-unstated A100 copy of [[sources/acc-fill-nvidia-ampere-whitepaper-a100-40gb]], added 2026-10-10 for [[accelerators/nvidia-a100-sxm]]. SAME DOCUMENT, SAME URL: a second source id is minted rather than the record reusing the 40 GB one, because this source is cited by the capacity-unstated accelerator and the source id is the audit trail from a figure back to the document that printed it. Vendor primary architecture document. Its Table 4 is a single 'NVIDIA A100' column, and that is exactly why it can back the capacity-unstated record's CAPACITY-INDEPENDENT figures: 'Memory Interface 5120-bit HBM2', 'GPU Boost Clock 1410 MHz', 'TDP 400 Watts', 'SMs 108', 'FP32 Cores / GPU 6912', 'FP64 Cores / GPU (excl. Tensor) 3456', 'Peak FP64 TFLOPS (non-Tensor) 9.7', 'Peak FP64 Tensor TFLOPS 19.5', 'Peak FP32 TFLOPS (non-Tensor) 19.5', 'Peak FP16 Tensor TFLOPS 312/624', 'Peak BF16 Tensor TFLOPS 312/624', 'Peak TF32 Tensor TFLOPS 156/312', 'Peak INT8 Tensor TOPS 624/1248', 'Peak INT4 Tensor TOPS 1248/2496', 'Transistors 54.2 billion', 'TSMC Manufacturing Process 7 nm N7'. The slash notation in the tensor rows is dense/sparse, so the DENSE value is the first number of each pair. Table 4 also carries the 40 GB memory rows ('Memory Size 40 GB', 'Memory Data Rate 1215 MHz DDR', 'Memory Bandwidth 1555 GB/sec') which the capacity-unstated record deliberately does NOT use. URL verified live and served as application/pdf on 2026-10-03.

Cross-references

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