inference/research
verifiedhigh · 0.90updated 2026-10-14

Argonne LLM-Inference-Bench: All_results.csv (4771 measured rows) + arXiv:2411.00136

paper

Fields

id
sources/argonne-llm-inference-bench-all-results-csv
Publisher
Argonne National Laboratory
Kind
paper
Published
2024-10-31
Accessed
2026-10-14
notes
Raw result dataset backing arXiv:2411.00136 (LLM-Inference-Bench, Chitty-Venkata et al., ANL). Columns: Hardware, Num of Hardware, Framework, Model, Input Output Length, Batch Size, Latency(s), Throughput(tok/s). Throughput = batch_size*(input+output tokens)/end-to-end latency per Eq.2 of the paper - AGGREGATE across the batch, not per-request decode. Hardware matrix (paper Table II): Nvidia A100 SXM 40GB x4/node, H100 SXM5 80GB x4, GH200 96GB x1, AMD MI250 x4 (Polaris), MI300X x8, Intel Max 1550, Habana Gaudi2 x8, SambaNova SN40L x8. Frameworks: vLLM 0.6.1 (0.5.2-xpu for Max1550), TensorRT-LLM 0.11.0, llama.cpp, DeepSpeed-MII, SambaFlow. Precision FP16/BF16. Rows labeled 'Intel PVC GPU' are a separate earlier dataset; only 'Intel Max 1550' rows are filed under xpu-intel-dc-gpu-max-1550. Input/output sweep: 128/256/512/1024/2048 tokens, batch 1/16/32/64.

Notes

Raw result dataset backing arXiv:2411.00136 (LLM-Inference-Bench, Chitty-Venkata et al., ANL). Columns: Hardware, Num of Hardware, Framework, Model, Input Output Length, Batch Size, Latency(s), Throughput(tok/s). Throughput = batch_size*(input+output tokens)/end-to-end latency per Eq.2 of the paper - AGGREGATE across the batch, not per-request decode. Hardware matrix (paper Table II): Nvidia A100 SXM 40GB x4/node, H100 SXM5 80GB x4, GH200 96GB x1, AMD MI250 x4 (Polaris), MI300X x8, Intel Max 1550, Habana Gaudi2 x8, SambaNova SN40L x8. Frameworks: vLLM 0.6.1 (0.5.2-xpu for Max1550), TensorRT-LLM 0.11.0, llama.cpp, DeepSpeed-MII, SambaFlow. Precision FP16/BF16. Rows labeled 'Intel PVC GPU' are a separate earlier dataset; only 'Intel Max 1550' rows are filed under xpu-intel-dc-gpu-max-1550. Input/output sweep: 128/256/512/1024/2048 tokens, batch 1/16/32/64.

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