SambaNova SN40L RDU Datasheet & Architecture Specifications

Fields

id

sources/asic-sambanova-sn40l

URL

https://sambanova.ai/hubfs/SambaNova%20SN40%20RDU.pdf

Publisher

SambaNova Systems

Kind

spec-sheet

Published

2024-09-10

Accessed

2026-10-11

notes

Official SambaNova SN40 RDU datasheet and product specification page (https://sambanova.ai/products/rdu-ai-chips). Specifies TSMC 5nm, Reconfigurable Dataflow Architecture, 640 TFLOPS BF16/FP8 compute, three-tier memory with 520 MB on-chip SRAM, 64 GB HBM2E, and up to 512 GB DDR5.

Notes

Official SambaNova SN40 RDU datasheet and product specification page (https://sambanova.ai/products/rdu-ai-chips). Specifies TSMC 5nm, Reconfigurable Dataflow Architecture, 640 TFLOPS BF16/FP8 compute, three-tier memory with 520 MB on-chip SRAM, 64 GB HBM2E, and up to 512 GB DDR5.

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