inference/research
verifiedhigh · 0.85updated 2026-10-17

NVIDIA TITAN V product page (German store page, spec table)

spec-sheet

Fields

id
sources/nvidia-titan-v-product-page
Publisher
NVIDIA
Kind
spec-sheet
Published
2017-12-07
Accessed
2026-10-17
notes
First-party product page. Spec table rows: Architektur NVIDIA Volta, Framebuffer 12 GB HBM2, Boost-Takt 1455 MHz, Tensor-Recheneinheiten 640, CUDA-Recheneinheiten 5120. Marketing copy states 21 billion transistors and more than 110 TeraFLOPS of deep-learning performance. The companion launch press release (nvidianews, 2017-12-07) says 21.1 billion transistors, 110 teraflops, TSMC 12 nm FFN, and a 12 GB HBM2 memory subsystem, but prints neither a bandwidth nor a board power, so both stay null rather than being copied from an aggregator. The 110 TFLOPS figure is the tensor-core deep-learning peak and the page does not name its precision, so it is filed as other rather than as fp16.

Notes

First-party product page. Spec table rows: Architektur NVIDIA Volta, Framebuffer 12 GB HBM2, Boost-Takt 1455 MHz, Tensor-Recheneinheiten 640, CUDA-Recheneinheiten 5120. Marketing copy states 21 billion transistors and more than 110 TeraFLOPS of deep-learning performance. The companion launch press release (nvidianews, 2017-12-07) says 21.1 billion transistors, 110 teraflops, TSMC 12 nm FFN, and a 12 GB HBM2 memory subsystem, but prints neither a bandwidth nor a board power, so both stay null rather than being copied from an aggregator. The 110 TFLOPS figure is the tensor-core deep-learning peak and the page does not name its precision, so it is filed as other rather than as fp16.

Cross-references

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