inference/research
verifiedhigh · 0.95updated 2026-10-04

AMD Instinct MI300X product page 'Specs Comparisons' charts - NVIDIA H100 figures printed at SPARSE (VERBATIM)

spec-sheet

Fields

id
sources/vb-amd-mi300x-h100-comparison-chart-sparse-basis
Publisher
AMD
Kind
spec-sheet
Accessed
2026-10-04
notes
THE CROSS-VENDOR TRAP, verified verbatim on the live page. AMD's own comparison charts against H100 SXM5 print: 'TF32 (Sparsity) 989.6 | 1307.4', 'FP8 (Sparsity) 3957.8 | 5229.8', 'FP64 (Vector) 33.5 | 81.7', 'FP32 (Vector) 66.9 | 163.4', 'Memory Capacity 80 | 192', 'Memory Bandwidth 3.4 | 5.3' (H100 SXM5 vs MI300X OAM). The H100 column values are SPARSE where a sparse label is given (989.6 TF32 and 3957.8 FP8), while the matching H100 footnote on the same page states '989.4 TFLOPS peak TensorFloat-32 (TF32) with sparsity, 1,978.9 TFLOPS peak theoretical half precision (FP16) with sparsity'. So AMD prints H100 at SPARSE, self-labelled. The H100's dense figures are 494.7 TF32 and 989.4 FP16/BF16. Anyone lifting the H100 number off an AMD chart without halving lands 2x high. No effect on the MI300X record's own rows (all its rows are AMD's own and correctly flagged); recorded because the same page is the MI300X record's source and the trap is one edit away.

Notes

THE CROSS-VENDOR TRAP, verified verbatim on the live page. AMD's own comparison charts against H100 SXM5 print: 'TF32 (Sparsity) 989.6 | 1307.4', 'FP8 (Sparsity) 3957.8 | 5229.8', 'FP64 (Vector) 33.5 | 81.7', 'FP32 (Vector) 66.9 | 163.4', 'Memory Capacity 80 | 192', 'Memory Bandwidth 3.4 | 5.3' (H100 SXM5 vs MI300X OAM). The H100 column values are SPARSE where a sparse label is given (989.6 TF32 and 3957.8 FP8), while the matching H100 footnote on the same page states '989.4 TFLOPS peak TensorFloat-32 (TF32) with sparsity, 1,978.9 TFLOPS peak theoretical half precision (FP16) with sparsity'. So AMD prints H100 at SPARSE, self-labelled. The H100's dense figures are 494.7 TF32 and 989.4 FP16/BF16. Anyone lifting the H100 number off an AMD chart without halving lands 2x high. No effect on the MI300X record's own rows (all its rows are AMD's own and correctly flagged); recorded because the same page is the MI300X record's source and the trap is one edit away.

Cross-references

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