AMD Instinct MI355X product page spec table

VERBATIM 2026-10-04, curl -L -A 'Mozilla/5.0 (Windows NT 10.0; Win64; x64)' from amd.com (page renders server-side; no JS execution needed). Every row of AMD's printed spec table, verbatim, in page order: 'GPU Architecture CDNA4' 'Lithography TSMC 3nm | 6nm FinFET' 'Stream Processors 16,384' / 'Matrix Cores 1,024' / 'Compute Units 256' 'Peak Engine Clock 2400 MHz' 'Peak Microscaling Four-bit Precision Matrix (MXFP4) Performance 10.1 PFLOPs' 'Peak Microscaling Six-bit Precision Matrix (MXFP6) Performance 10.1 PFLOPs' 'Peak Microscaling Eight-bit Precision Matrix (MXFP8) Performance 5 PFLOPs' 'Peak Open Compute Project Eight-bit Precision Matrix (OCP-FP8) Performance (E5M2, E4M3) 5 PFLOPs' 'Peak Open Compute Project Eight-bit Precision Matrix (OCP-FP8) Performance with Structured Sparsity (E5M2, E4M3) 10.1 PFLOPs' 'Peak Half Precision Matrix (FP16) Performance 2.5 PFLOPs' 'Peak Half Precision Matrix (FP16) Performance with Structured Sparsity 5 PFLOPs' 'Peak Half Precision (FP16) Performance 157.3 TFLOPs' [vector path - label omits 'Matrix'] 'Peak Single Precision Matrix (FP32) Performance 157.3 TFLOPs' 'Peak Single Precision (FP32) Performance 157.3 TFLOPs' 'Peak Double Precision Matrix (FP64) Performance 78.6 TFLOPs' 'Peak Double Precision (FP64) Performance 78.6 TFLOPs' 'Peak INT8 Matrix Performance 5 POPs' 'Peak INT8 Matrix Performance with Structured Sparsity 10.1 POPs' 'Peak bfloat16 (BF16) Matrix Performance 2.5 PFLOPs' 'Peak bfloat16 (BF16) Matrix Performance with Structured Sparsity 5 PFLOPs' 'Transistor Count 185 Billion' 'Typical Board Power (TBP) 1400W (TBP)' 'Last Level Cache (LLC) 256 MB' / 'Dedicated Memory Size 288 GB' / 'Dedicated Memory Type HBM3E' / 'Infinity Cache Yes' / 'Peak Memory Bandwidth 8 TB/s' / 'Memory ECC Support Yes (Full-Chip)' 'GPU Form Factor OAM Module' / 'Bus Type PCIe 5.0 x16' / 'Infinity Fabric Links 7' / 'Peak Infinity Fabric Link Bandwidth 153 GB/s' / 'Scale-out AMD Infinity Fabric Links (Per GPU) 1' AMD's convention is explicit and footnote-free: the unlabelled row is DENSE and the row explicitly titled 'with Structured Sparsity' is exactly 2x. Sparse labelling appears ONLY on OCP-FP8, FP16 matrix, INT8 and BF16. MXFP4, MXFP6, MXFP8, FP32 and FP64 have no sparse row at all and are therefore dense as printed. CROSS-VENDOR CHECK: this page's comparison charts plot 'B200 SXM5' against 'MI355X OAM' with the axis label 'FP16/BF16 Tensor / FP16/BF16 Matrix (Sparsity)' at '4.5' for B200 vs '5.0' for MI355X, and 'FP8 Tensor / OCP-FP8 Matrix (Sparsity)' at '9' for B200 vs AMD's sparse figure. AMD is quoting NVIDIA's SPARSE numbers (4.5 and 9 PFLOPS), confirmed against NVIDIA's own datasheet where 4.5 and 9 are the printed sparse figures and dense is 2.2 and 4.5. So AMD's chart must never be read as dense B200 figures. NOT ON THIS PAGE: memory interface width. The string '8192' does not appear anywhere in the MI355X page, so amd-instinct-mi355x's memory_bus_bit 8192 is carried over from the MI350X page or the GD-176 brochure and is NOT stated by this source.