Cambricon MLU370-X8 product page - MLU-Link 200 GB/s and its stated 3.1x PCIe 4.0 ratio (VERBATIM, Chinese)

CONVENTION EVIDENCE for the interconnect figure. Cambricon states '每张加速卡可获得200GB/s的通讯吞吐性能，是PCIe 4.0带宽的3.1倍' - 200 GB/s per card, 3.1 times PCIe 4.0 bandwidth. 200 / 3.1 = 64.5 GB/s, which is PCIe Gen4 x16 AGGREGATE (64 GB/s aggregate / 32 GB/s per direction), NOT the ~31.5 GB/s per-direction figure. So Cambricon uses the AGGREGATE convention, the same as Intel and the same as AMD's Infinity Fabric 128 GB/s per-link label - all three vendors in this corpus quote bidirectional/aggregate totals. This is the third independent vendor confirmation in this audit that the corpus-wide convention is aggregate-when-unlabelled. Supporting spec: 'MLU-Link接口 4 ports, 16 Lanes, 50 Gbps' = 4 x 16 x 50 Gbps = 3.2 Tb/s of raw SerDes, so the published 200 GB/s is roughly half the raw lanes - consistent with a bidirectional aggregate after encoding overheads. The 'other' interconnect in the record is this MLU-Link path, NOT the host interface. NO PCIe bandwidth is published for this card.