Cerebras WSE-3 Turbo (WSE-3T) chip page - 250 petaflops, 900,000 cores, 46,225 mm2

Verbatim: 'Four trillion transistors. 250 petaflops. One silicon wafer.' 'The Cerebras WSE-3 Turbo (WSE-3T) is the largest AI chip ever built, measuring 46,225 mm2 and containing 4 trillion transistors. It delivers 250 petaflops of AI compute through 900,000 AI-optimized cores - 19x more transistors and 56x more compute than the NVIDIA B300.' This confirms that 250 petaflops belongs to the WSE-3 Turbo (the wafer inside the CS-4 system), NOT to the CS-3 / WSE-3 part and NOT as a sparse counterpart of the CS-3's 125. Cross-check: cerebras.ai/cs4 states the CS-4 is 'powered by three WSE-3T processors' and that 'each wafer delivers up to 2x the speed of the previous generation'. Cerebras does not publish an on-wafer SRAM capacity or memory-bandwidth figure on the /chip page.