Groq LPU architecture page - absence of any per-chip compute or SRAM capacity figure

Negative-evidence record. Full text of groq.com/lpu-inference-engine was read on the access date; the only quantity it states is the 'upwards of 80 terabytes/second' SRAM bandwidth, the 'about eight terabytes/second' HBM contrast, and the 14 nm / 4 nm process statements. There is no TFLOPS/TOPS figure and no SRAM capacity figure anywhere on the page. Therefore the 188 TFLOPS FP16, 750 TOPS INT8 and 0.23 GB (230 MB) SRAM values in accelerators/groq-lpu.json are NOT confirmable from groq.com; they remain press/secondary attributions and their vendor_claim:false / source_id:null flags are correct.