Intel Gaudi 3 AI Accelerator Technical Paper - '1677 TFlops per MME chip' prose vs 1678 in the tables
whitepaper
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id
sources/vb-intel-gaudi3-paper-mme-1677-vs-1678Publisher
Intel
Kind
whitepaper
Accessed
2026-10-04
notes
INTERNAL INCONSISTENCY IN INTEL'S OWN PAPER, recorded so nobody 'fixes' either number silently. Table 1 and Table 5 both print BF16 MME TFLOPS = 1678 for the Gaudi 3, and the records store 1678. But the MME Architecture prose says: 'housing eight Matrix Multiplication Engines (MMEs). Each of these engines is equipped with 64K Multiply-Accumulate Units (MACs), which collectively enable a peak throughput of 1677 TFlops per MME chip.' 1677 vs 1678 in the same document. The 1678 figure is the one in both tables and is the one stored; the 1677 prose figure is almost certainly a rounding-boundary artifact of 64K MACs x 2 ops x clock. Not a repo error - flagged as an upstream one.
Notes
INTERNAL INCONSISTENCY IN INTEL'S OWN PAPER, recorded so nobody 'fixes' either number silently. Table 1 and Table 5 both print BF16 MME TFLOPS = 1678 for the Gaudi 3, and the records store 1678. But the MME Architecture prose says: 'housing eight Matrix Multiplication Engines (MMEs). Each of these engines is equipped with 64K Multiply-Accumulate Units (MACs), which collectively enable a peak throughput of 1677 TFlops per MME chip.' 1677 vs 1678 in the same document. The 1678 figure is the one in both tables and is the one stored; the 1677 prose figure is almost certainly a rounding-boundary artifact of 64K MACs x 2 ops x clock. Not a repo error - flagged as an upstream one.
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