Groq LPU technology page - the 80 TB/s on-chip SRAM bandwidth sentence, and the CONFIRMED ABSENCE of any per-chip compute figure

VERBATIM 2026-10-04 via web_extract. This record exists to make the existing negative finding in accelerators/groq-lpu auditable rather than asserted. THE ONE HARD NUMBER ON THE PAGE, VERBATIM: 'Groq on-chip SRAM has memory bandwidth upwards of 80 terabytes/second, while GPU off-chip HBM clocks in at about eight terabytes/second. That difference alone gives LPUs up to a 10X speed advantage, o[ver] the boost LPUs get from not having to go back and forth to a separate memory chip to retrieve data.' Note 'upwards of' - it is a lower bound, not a peak. PROCESS NODE, VERBATIM: 'Our current chip set is built on a 14 nanometer process. As we move towards a 4 nanometer process, the...' This corroborates the stored process_nm 14 and is the only process statement on the page. MEMORY ARCHITECTURE, VERBATIM: '_On-chip Memory_' section: 'LPUs include both memory and compute on-chip, vastly improving the speed of storing and retrieving data while eliminating timing variation... GPUs utilize separate high-bandwidth memory chips, introducing complexity - multiple layers of memory cache, switches, and routers to move the data back and forth... Having the memory on the same chip improves the efficiency and speed of each I/O action and removes complexity and uncertainty.' This corroborates the stored memory_type 'sram (on-chip only, no DRAM tier)'. NEGATIVE FINDING - CONFIRMED, NO PER-CHIP COMPUTE FIGURE: the page states NO TFLOPS, NO TOPS and NO per-chip compute throughput of any kind. A full sweep of the extracted 10,096-character text found exactly one bandwidth number (the 80 TB/s SRAM figure) and one process node (14 nm), and no compute figure. This CONFIRMS the negative already recorded in accelerators/groq-lpu and in the existing source vb-groq-lpu-no-perchip-figures. Therefore: - the stored fp16 188 TFLOPS and int8 750 TOPS rows, both basis 'unverified' with source_id null, REMAIN UNSOURCED and correctly flagged. Groq does not publish these numbers on this page. - the stored memory_bandwidth_gbps 80000 is supported by the 80 TB/s SRAM sentence, but as a lower bound ('upwards of 80 terabytes/second'), which a bare numeric field cannot express. The field should be understood as '>= 80,000'. - the stored vram_gb 0.23 is NOT stated on this page anywhere. Groq publishes no SRAM capacity figure here. That value therefore has no vendor source and should be treated as unverified for the same reason the compute rows are. SPARSITY/DENSE CONVENTION: no sparsity footnote, no 'with Structured Sparsity' title, no sparse/dense pair; moot since no compute figure is published. Recorded so that a future reader does not assume Groq follows the NVIDIA halving convention and halve a figure that does not exist.