Intel Data Center GPU Max Series product brief (Max 1100 / 1450 / 1550 architecture table)

VERBATIM 2026-10-04 via web_extract. Companion to w4h-intel-dc-gpu-max-1550-ark-spec-table. COMPARISON TABLE, columns 'Max 1550 GPU (600W OAM)' | 'Max 1450 GPU (600W OAM)' | 'Max 1100 GPU (300W AIC)', verbatim: 'Architecture | Xe HPC | Xe HPC | Xe HPC' 'Xe Cores | 128 | 128 | 56' 'Memory | HBM2E 128 GB | HBM2E 128 GB | HBM2E 48 GB' 'Cache L1 | 64 MB | 64 MB | 28 MB' 'Cache L2 | 408 MB | 408 MB | 108 MB' 'Max TDP | 600W | 600W | 300W' 'Form Factor | OAM | AIC | Host Interconnect' 'PCIe Gen5 Physical Ports | Xe Link 53 GB/s 16 ports | Xe Link 26.5 GB/s 16 ports | Xe Link 53 GB/s 6 ports' PROSE, VERBATIM: 'Intel® Data Center Max 1550 GPU: Intel's maximum performance 600-watt OAM module with 128 Xe cores and 128 GB of HBM.' Also 'Based on the Xe HPC architecture that uses both EMIB 2.5D and Foveros packaging technologies to combine 47 active tiles onto a single GPU, fabricated on five different process nodes', and 'Up to 408 MB of L2 cache based on discrete SRAM technology, 64 MB of L1 cache and up to 128 GB of high-bandwidth memory.' NO COMPUTE FIGURES IN THIS DOCUMENT EITHER. Read in full, the Max Series product brief states NO TFLOPS and NO TOPS figure for the Max 1550 or for any other Max Series part: it gives architecture, cache, memory, TDP, form factor and interconnect only. This is a NEGATIVE finding and it matters, because accelerators/xpu-intel-dc-gpu-max-1550 currently carries fp16 409, bf16 409, int8 819 and fp32 52 TFLOPS attributed to a GitHub README - Intel itself publishes none of those numbers for this part, and no Intel document was found that does. SPARSITY CONVENTION: no sparsity footnote and no 'with Structured Sparsity' row title anywhere in this document; the strings 'sparse'/'sparsity' do not occur in the compute sense. Nothing to halve; every figure above is dense as printed.