Moore Threads MTT S4000 product specification table (docs.mthreads.com doc centre, 产品规格书) - PUBLISHES the compute rows the product page omits

VERBATIM 2026-10-05 via web_extract. THIS DOCUMENT SETTLES THREE FIGURES THE PRODUCT PAGE DOES NOT CARRY, and it corrects two earlier negative findings in this repo. THE SPEC TABLE, VERBATIM, the four rows that matter ('算力（向量）' = vector compute, '算力（张量）' = tensor compute): 算力（向量） | FP32/FP16 | 25 TFLOPS 算力（张量） | TF32 | 50 TFLOPS 算力（张量） | FP16/BF16 | 100 TFLOPS 算力（张量） | INT8 | 200 TOPS MEMORY, VERBATIM ('显存规格'): 显存速率 16 Gbps | 显存容量 48 GB | 显存类型 GDDR6 | 显存位宽 384 bits | 显存带宽 768 GB/s. The bandwidth is therefore RE-DERIVABLE on the vendor's own numbers: 384/8 x 16e9 = 768 GB/s exactly. This is the document that supplies the memory type and bus width that data/accelerators/moore-threads-s4000 previously had to flag as provisional. POWER AND INTERCONNECT, VERBATIM: 功耗 整卡功耗 450 W; MTLink 'x8 Serdes in the gold finger, Speed: up to 56Gbps PAM4'; PCIe 总线接口 PCIe 5.0 x16; 频率 1.5 GHz; 图形芯片 QY102AA-800; 重量 1.34 kg; 268 mm x 110 mm, 双槽 (dual slot); 被动散热 (passive). WHY THIS MATTERS - IT CONTRADICTS TWO STORED SOURCES IN THIS REPO, AND THE PRODUCT PAGE IS THE CULPRIT: 1. data/accelerators/moore-threads-s4000 has an EMPTY flops array on the strength of w4h-mthreads-s4000-product-page-no-figure, which recorded that the product page 'publishes NO TFLOPS, NO TOPS'. That negative finding is TRUE OF cn-mthreads-s4000 (https://www.mthreads.com/product/S4000, which I re-read 2026-10-05 and which carries only 'FP32 Supported / TF32 Tensor Supported / ...' with numbers attached to nothing) and FALSE OF THE VENDOR. Moore Threads' own documentation centre publishes all four compute rows. A negative finding scoped to one URL was generalised to the vendor, which is precisely the failure mode AGENTS.md's disagreement rules exist to prevent. 2. The English product page (https://en.mthreads.com/product/S4000) does print 'Memory Bandwidth 768 GB/s' and 'Max TGP 450W', so those two were already sourced - but ONLY to the product page, and the record cited a Chinese-language page for them. This doc centre is the better source for both because it also carries the derivation. CONVENTION, RECORDED SO NOBODY HALVES THESE FOUR NUMBERS: there is NO sparsity footnote anywhere on this page. No row is titled for structured sparsity, no '2:4' appears, and the strings 'sparse'/'sparsity'/'稀疏' do not occur in the document. Every one of the four rows is DENSE as printed and must be recorded dense:true unhalved. Note the table's own split, which is a genuine precision/path distinction rather than a sparsity one: the vector row is labelled 'FP32/FP16 25 TFLOPS' (one number serving both, i.e. the vector unit is symmetric between FP32 and FP16), while FP16 ALSO appears under 算力（张量） at 100 TFLOPS. Those are two different hardware paths - the schema's 'unit' field exists for exactly this - so an fp16 row must say which path it is on rather than silently taking one of the two. UNITS ARE NOT INTERCHANGEABLE AND THE TABLE KNOWS IT: the vector and tensor rows are printed in TFLOPS, the INT8 row in TOPS. 200 TOPS is recorded as a tflops value of 200 because the schema's field is TFLOPS and one INT8 op is one operation; the basis_detail states the printed unit so a reader is not misled into thinking the vendor wrote '200 TFLOPS'.