Cerebras blog 'CS-3: the world's fastest and most scalable AI accelerator' (2024-03-12) - MemoryX external-memory SKUs, and the Weight Streaming architecture that needs them

READ IN FULL 2026-10-08 by w8-reverify specifically to settle whether Cerebras publishes ANY external-memory figure for the CS-3, because accelerators/cerebras-wse-3.json holds vram_gb: null and a null is only defensible if the absence was actually checked. THE FIGURES IT DOES PUBLISH, VERBATIM: 'The CS-3 can be configured with up to 1,200 terabytes of external memory - allowing a single system to train models of up to 24 trillion parameters'. 'Unlike GPUs, Cerebras Wafer Scale Clusters de-couple compute and memory components, allowing us to easily scale up memory capacity in our MemoryX units. Cerebras CS-2 clusters supported 1.5TB and 12TB MemoryX units. With the CS-3, we are dramatically increasing the MemoryX options to include 24TB and 36TB SKUs for enterprise customers and 120TB, and 1,200 TB options for hyperscalers. The 1,200 TB configuration is capable of storing models with 24 trillion parameters.' 'A single CS-3 can be paired with a single 1,200 TB MemoryX unit.' Also: 'up to 2048 CS-3 systems can be linked together', 'A full cluster of 2048 CS-3s delivers 256 exaflops', 'thanks to Cerebras' unique Weight Streaming architecture, the entire cluster looks and programs like a single chip'. WHY THIS DOES NOT CHANGE vram_gb ON THE PART RECORD, WHICH IS THE WHOLE POINT OF READING IT: every one of those figures is a capacity for a SEPARATE MemoryX ATTACHMENT UNIT sized for a CLUSTER, not on-package memory for the WSE-3 part. The smallest listed SKU is 24 TB - 545x the wafer's own 44 GB - and the figures are quoted for multi-system configurations. The blog publishes NO per-part DRAM capacity and NO per-part or per-MemoryX bandwidth for this tier anywhere, so there is nothing that could go in vram_gb or memory_bandwidth_gbps on a per-device record. The 1.2 Tb/s 'System I/O' figure on the CS-3 datasheet is the only published rate between the wafer and anything external, and it is system I/O bandwidth, not a memory-tier rate. WHAT IT DOES ESTABLISH, and why this record exists: the null is not 'Cerebras publishes no memory numbers', it is 'Cerebras publishes no per-part DRAM figure, and its published external capacities are attachment-unit figures with no per-part bandwidth'. Those are different statements and only the second one is true. It also documents the architectural fact that makes the on-wafer-only reading correct for inference work: Cerebras's own answer to 'the model is bigger than 44 GB' is an external unit reached over a Weight Streaming path, which is exactly the weight-streaming bottleneck a GPU avoids by having HBM on-package. A reader asking 'what happens when a 70B model does not fit on-chip' finds the answer here and nowhere else in this repo. CITED BY accelerators/cerebras-wse-3.json for exactly this reason.