inference/research
verifiedhigh · 0.95updated 2026-10-04

Dell XE9785L 8xMI355X, MLPerf Inference v6.1 Server: Llama 3.1 8B aggregate output throughput under the Server latency constraint

148563.48 output tokens/s (aggregate, harness 'Completed tokens per second')

Fields

id
benchmarks/bench-mlperf-v6-1-dell-mi355x-llama3-1-8b-server
Metric
tps_aggregate
Value
148,563.48
Unit
output tokens/s (aggregate, harness 'Completed tokens per second')
Model
Llama 3.1 8B (MLPerf v6.1 submission, FP8 weights)
Methodology
AGGREGATE. MLPerf Inference v6.1 Closed division, Datacenter suite, SERVER scenario. HARDWARE (MLPerf system id XE9785L_8xMI355X): 8xAMD Instinct MI355X 288GB HBM3e, 1 node. LOADS: target_qps 0.5 Poisson arrivals, min_duration 120000 ms, compiled-in per-query TTFT/TPOT 99th-percentile bounds, 'Performance constraints satisfied : Yes', TTFT and TPOT early stopping both successful. Batch size not a fixed published number. Completed samples per second 1157.99. Model shape GEN_LEN 8127480. The full latency distribution is preserved in the source log and is unusually informative: min 1.758 s, mean 8.146 s, p50 8.308 s, p90 8.929 s, p95 9.095 s, p97 9.207 s, p99 9.428 s, max 10.647 s. POWER: has_power=False, design_power_watts=null, no declared cap. OMITTED BY SOURCE: TP size, KV dtype, concurrency, clock state, cooling.
Measured by
vendor
Reproducible
yes
notes
6.2% below Offline (158458 -> 148563.48) - the largest single-node scenario discount in this round, and the reason is visible in the latency block: this run holds an 8.1 s mean with a tight 9.4 s p99, i.e. it is deliberately running long generations to keep the tail inside the Server bound. The p99/p50 ratio is only 1.13, which is the Server scenario working as designed. Worth recording for the tail numbers as much as the throughput: they are what a production SLO conversation actually needs, and they are here because the benchmark forces them to be published. INTERCONNECT IDS FILLED 2026-10-04: interconnect_ids was empty; it now carries the interconnect list of the accelerator record(s) this run names (amd-instinct-mi355x). BASIS AND ITS LIMITS, stated because this field is easy to over-read: it records the FABRIC PRESENT IN THE HARDWARE CONFIGURATION, which is how every previously-filled record in this repo reads it, not traffic measured over that fabric. The clearest evidence for that convention is that single-GPU records already carry a scale-up fabric here - trtllm-llama31-8b-fp8-h100-1k1k-tps is 1x H100 at TP=1 and carries ['nvlink-4','nvswitch-4'] - and that host-link-only records carry a PCIe value (arc-pro-b70-mlperf-v6-1-llama2-70b-offline-tokens carries ['pcie-gen5'] on 4x Arc Pro B70, which has no GPU-to-GPU fabric at all). So a value here does NOT mean the interconnect was exercised by this particular workload, and must not be cited as evidence that it was. Whether the run actually crossed that fabric is a question about TP/EP/PP size, which this repo records in methodology, not here. NOT INVENTED: nothing was filled where the accelerator record itself carries no interconnect, so this field stays empty for any part whose own record has none - which is the honest state for a single-socket Apple sOC and for parts whose vendor publishes no host interface.

Notes

6.2% below Offline (158458 -> 148563.48) - the largest single-node scenario discount in this round, and the reason is visible in the latency block: this run holds an 8.1 s mean with a tight 9.4 s p99, i.e. it is deliberately running long generations to keep the tail inside the Server bound. The p99/p50 ratio is only 1.13, which is the Server scenario working as designed. Worth recording for the tail numbers as much as the throughput: they are what a production SLO conversation actually needs, and they are here because the benchmark forces them to be published. INTERCONNECT IDS FILLED 2026-10-04: interconnect_ids was empty; it now carries the interconnect list of the accelerator record(s) this run names (amd-instinct-mi355x). BASIS AND ITS LIMITS, stated because this field is easy to over-read: it records the FABRIC PRESENT IN THE HARDWARE CONFIGURATION, which is how every previously-filled record in this repo reads it, not traffic measured over that fabric. The clearest evidence for that convention is that single-GPU records already carry a scale-up fabric here - trtllm-llama31-8b-fp8-h100-1k1k-tps is 1x H100 at TP=1 and carries ['nvlink-4','nvswitch-4'] - and that host-link-only records carry a PCIe value (arc-pro-b70-mlperf-v6-1-llama2-70b-offline-tokens carries ['pcie-gen5'] on 4x Arc Pro B70, which has no GPU-to-GPU fabric at all). So a value here does NOT mean the interconnect was exercised by this particular workload, and must not be cited as evidence that it was. Whether the run actually crossed that fabric is a question about TP/EP/PP size, which this repo records in methodology, not here. NOT INVENTED: nothing was filled where the accelerator record itself carries no interconnect, so this field stays empty for any part whose own record has none - which is the honest state for a single-socket Apple sOC and for parts whose vendor publishes no host interface.

Cross-references

Accelerators (1)

Engine (1)

Format (1)

Interconnect (3)