inference/research
verifiedhigh · 0.90updated 2026-10-05

MXFP4 native hardware support on CDNA4 (MI350X/MI355X)

compute bound

Fields

id
flops/amd-fp4-mxfp4-support
Class
decode_gemm
Bound by
compute
Scales with
precisionbatch_sizematrix_dimensions
Hardware parameters
parametermemory_bandwidtheffectThe key inference advantage is memory bandwidth: 4-bit weights halve the memory traffic vs 8-bit, which is the primary bottleneck in decode.basisunverifiedvalues_foramd-instinct-mi350x,amd-instinct-mi355x,gfx950
Workarounds
MXFP4 is only available on CDNA4 (MI350X/MI355X) - not on CDNA3MXFP4 runs at the same throughput as MXFP6 (9.2 PFLOPS on MI350X, 10.1 PFLOPS on MI355X)MXFP4 uses block-scaled representation with per-block scaling factors
notes
CDNA4 adds native hardware support for MXFP4 (Microscaling 4-bit floating point) at 9.2 PFLOPS on MI350X and 10.1 PFLOPS on MI355X. This is 2x the OCP-FP8 rate and equal to the MXFP6 rate. MXFP4 uses the OCP MX block-scaled format where each block of elements shares a scaling factor (typically 32 elements per block). The key inference advantage is memory bandwidth: 4-bit weights halve the memory traffic vs 8-bit, which is the primary bottleneck in decode. AMD's product page prints 'Peak Microscaling Four-bit Precision Matrix (MXFP4) Performance 10.1 PFLOPs' with NO sparsity variant - so 10.1 PFLOPS is the DENSE figure. This is distinct from CDNA3 which has no FP4 support at all. The practical use case is weight-only quantization for memory-bound decode workloads. AMD's vLLM blog shows GPT-OSS-120B running with FP4 quantized weights and BF16 computation on MI355X. DANGLING REF, LEFT UNRESOLVED (2026-10-04 cross-reference repair): affected_by_hardware also carries 'gfx950', an AMD GPU ARCHITECTURE CODE, not a record id, and it spans more than one accelerator record: amd-instinct-mi350x, amd-instinct-mi355x and amd-instinct-mi350p are all CDNA4 (gfx950). Because one value in this field resolves to several accelerator records, it cannot be rewritten to a single id, and the field is typed as accelerator ids so this is a mixed-bucket value that belongs in a sibling field for architecture codenames. Left unchanged deliberately. HARDWARE-PARAMETER ROWS ADDED 2026-10-05 (schema authority pass, agent w5-schema). `affected_by_hardware` names PRODUCTS (accelerator record ids); these rows name the hardware QUANTITIES that move this class's cost, which had nowhere to live until flop.hardware_parameters was added in this commit. Every effect below is lifted verbatim from this record's own existing prose and no figure here is new - `magnitude` reproduces numbers the record already quoted. `basis` is 'unverified' where the effect was asserted with nothing concrete behind it, rather than being dressed up. The rows were pulled out of free-text notes; they are not a change to what this record claims.

Notes

CDNA4 adds native hardware support for MXFP4 (Microscaling 4-bit floating point) at 9.2 PFLOPS on MI350X and 10.1 PFLOPS on MI355X. This is 2x the OCP-FP8 rate and equal to the MXFP6 rate. MXFP4 uses the OCP MX block-scaled format where each block of elements shares a scaling factor (typically 32 elements per block). The key inference advantage is memory bandwidth: 4-bit weights halve the memory traffic vs 8-bit, which is the primary bottleneck in decode. AMD's product page prints 'Peak Microscaling Four-bit Precision Matrix (MXFP4) Performance 10.1 PFLOPs' with NO sparsity variant - so 10.1 PFLOPS is the DENSE figure. This is distinct from CDNA3 which has no FP4 support at all. The practical use case is weight-only quantization for memory-bound decode workloads. AMD's vLLM blog shows GPT-OSS-120B running with FP4 quantized weights and BF16 computation on MI355X. DANGLING REF, LEFT UNRESOLVED (2026-10-04 cross-reference repair): affected_by_hardware also carries 'gfx950', an AMD GPU ARCHITECTURE CODE, not a record id, and it spans more than one accelerator record: amd-instinct-mi350x, amd-instinct-mi355x and amd-instinct-mi350p are all CDNA4 (gfx950). Because one value in this field resolves to several accelerator records, it cannot be rewritten to a single id, and the field is typed as accelerator ids so this is a mixed-bucket value that belongs in a sibling field for architecture codenames. Left unchanged deliberately.

HARDWARE-PARAMETER ROWS ADDED 2026-10-05 (schema authority pass, agent w5-schema). `affected_by_hardware` names PRODUCTS (accelerator record ids); these rows name the hardware QUANTITIES that move this class's cost, which had nowhere to live until flop.hardware_parameters was added in this commit. Every effect below is lifted verbatim from this record's own existing prose and no figure here is new - `magnitude` reproduces numbers the record already quoted. `basis` is 'unverified' where the effect was asserted with nothing concrete behind it, rather than being dressed up. The rows were pulled out of free-text notes; they are not a change to what this record claims.

Cross-references

Hardware-dependent (2)