inference/research
verifiedhigh · 0.90updated 2026-10-19

DeepSeek-V4-Pro

moe 49/1600B active

Fields

id
models/deepseek-v4-pro
Family
deepseek-v4
Vendor
DeepSeek
Release year
2026
Architecture
moe
Params (B)
1,600
Active params (B)
49
Experts
384
Experts per token
6
Shared expert
yes
Hidden size
7,168
Layers
61
KV heads
1
Head dim
512
GQA ratio
128
Max context
1,048,576
Context scaling
YaRN (factor 16, original 65536)
Context scaling method
yarn
Activation
silu
Attention variant
MLA variant with compressed KV, sliding_window 128, sparse indexer index_topk 1024; kv_lora_rank absent from config
QK rope head dim
64
KV compression
per-layer compress_ratios (config), length 61 = num_hidden_layers: layers 0-1 ratio 128 (HCA baseline), layer 2 ratio 4 (CSA), then layers 3-59 alternate ratio 4 (CSA) and ratio 128 (HCA), layer 60 ratio 0. Paired with sliding_window 128, num_hash_layers 3 and index_topk 1024.
FLOPs per active token
98,000,000,000
Open weights
yes
License
MIT
benchmarks
nameMMLU-Proscore87.5scale100higher_is_betteryessourcehf-deepseek-v4-provendor_claimyesnameGPQA Diamondscore90.1scale100higher_is_betteryessourcehf-deepseek-v4-provendor_claimyesnameLiveCodeBench v6score93.5scale100higher_is_betteryessourcehf-deepseek-v4-provendor_claimyesnameSWE-bench Verifiedscore80.6scale100higher_is_betteryessourcehf-deepseek-v4-provendor_claimyesnameSWE-bench Proscore55.4scale100higher_is_betteryessourcehf-deepseek-v4-provendor_claimyes
notes
KV GEOMETRY: kv_cache_bytes_per_token REMAINS NULL, and the reason is now precise rather than vague. The trap on this family is assuming MLA: config has NO kv_lora_rank, so the DeepSeek-V2/V3 latent formula (layers x (kv_lora_rank + qk_rope_head_dim) x 2) does not apply either. V4 instead declares a per-layer compress_ratios array of ints, which transformers maps to attention layer types via _COMPRESS_RATIO_TO_LAYER_TYPE: 0 -> sliding_attention (full 128-token sliding-window KV), 4 -> compressed_sparse_attention (CSA, compress_rate 4, plus a Lightning Indexer running its own compressor at index_head_dim 128 over the same windows), 128 -> heavily_compressed_attention (HCA, compress_rate 128, one compressed entry per 128 tokens). Flash: 1 sliding / 30 CSA / 31 HCA over 43 layers. Pro: 1 / 30 / 31 over 61. Why this is not derivable to a single number: every compressor layer retains its sliding-window KV PLUS a growing compressed-KV list PLUS (on CSA layers) a second indexer series plus a 2x-compress_rate_csa overlap buffer, and the three interleave. An exact figure needs the CSA/HCA overlap accounting in modeling_deepseek_v4.py, not config arithmetic. What IS safe to state: the naive GQA reading (num_layers x num_kv_heads 1 x head_dim 512 x 2 x 2 = 124,928 B/token, 122.0 KiB) is wrong because it charges every layer a full head_dim 512 K and V per token, while HCA layers charge head_dim x 2 x 2 / 128 per token - about 16.0 B/token/layer, a 128x reduction on 31 of the layers. So the naive figure OVERSTATES V4's KV, and the direction matters for serving: it would say V4-Flash needs 122.0 KiB/token when its compressed design is precisely what makes 1M context tractable. The 1.6T flagship of the V4 preview. Vendor: 1.6T total / 49B activated, 1M context, trained on 32T+ tokens; safetensors total 1598.84B. Config: 61 layers (same depth as V3), hidden 7168, 384 routed + 1 shared experts (up from V3's 256), 6 per token, moe_intermediate_size 3072, head_dim 512, num_key_value_heads 1, q_lora_rank 1536, YaRN factor 16 over 65536, sliding_window 128, index_topk 1024. kv_cache_bytes_per_token is null for the same reason as V4-Flash: no kv_lora_rank in the config, and the compressed-cache geometry is not derivable from the fields present. Released as FP4 + FP8 mixed (expert params in FP4), so the published weights are far below 1.6 TB. MIT. SERVICEABILITY JOIN (added 2026-10-03; the architecture x engine matrix this record was missing, with a citation per cell in docs/13-model-compatibility.md): FAMILY=mla. REQUIRED KERNEL CLASS: an MLA decode kernel. MLA is not a variant of the GQA kernel - the cache is a shared low-rank latent (d_c) plus a decoupled RoPE key, not per-head K/V, so an engine that lacks a dedicated MLA decode path cannot serve the class at all. SUPPORTED BY (cited): vLLM native rows DeepseekV2ForCausalLM, DeepseekV3ForCausalLM, DeepseekV32ForCausalLM, DeepseekV4ForCausalLM [[mdl2-vllm-supported-models-2026-10]]; TensorRT-LLM the same four rows plus GlmMoeDsaForCausalLM (GLM-5), Glm4MoeForCausalLM (GLM-4.5/4.6/4.7), KimiK3ForConditionalGeneration and KimiLinearForCausalLM [[mdl2-trtllm-supported-models]]; SGLang generative table names DeepSeek v1/v2/v3/R1 and Kimi K2 as supported [[mdl2-sglang-generative-models]]; llama.cpp reaches MLA through the DEEPSEEK2/DEEPSEEK32/DEEPSEEK4 arch entries, which are in its supports_sm_tensor == false list, i.e. no tensor-core matmul path for the attention itself [[mdl2-llamacpp-arch-class-registry]]; ik-llama-cpp records MLA as a feature that landed there first and was later upstreamed [[ik-llama-cpp]].ENGINE KERNEL CONSTRAINTS THAT CHANGE WHAT THE ENGINE MUST STORE (this is the important class of fact): (1) FlashInfer, which is SGLang's default attention backend and selectable in vLLM [[flashinfer]], is where the MLA decode kernels live, and they are instantiated per KV cache page-block size: gotcha-sm120-sparse-mla-block-size records vLLM computing compressed-layer pbs = block_size // compress_ratio (= 32 at block_size 64 for a ratio-2 layer) while FlashInfer's SM120 planner hard-codes _PAGE_BLOCK_SIZE = 64, so DeepSeek-V4.1-Flash will not start on 8x RTX PRO 6000 at TP8 at ANY global block size (64 gives pbs=32 and crashes; 128 gives 'No common block size'). Workaround is SM100 datacenter Blackwell or a FlashInfer planner change. (2) FlashMLA's 2026.09.30 release requires SM100/SM103 and CUDA >= 13.1, REMOVED Hopper support and removed V3/V3.2/V4.0, and supports ONLY FP8 and FP4 KV cache - unquantized bfloat16 KV is explicitly not supported [[kern-flashmla-github]]. So the kernel choice decides the KV CACHE FORMAT: to use that decode kernel the engine must store an FP8/FP4 latent with per-token inlined scales, and V4.1's layout is 528 bytes/token (512 of float8_e4m3 over all 512 dims - the 64 RoPE dims are quantized too, no bf16 part - plus 16 bytes of float8_e8m0 scales, one per 32 e4m3 values), with an fp4 variant at 288 bytes/token [[flashmla-decode-fp8-fp4-kv]]. A Hopper box therefore cannot take that kernel and an engine that only offers bf16 MLA KV cannot take it either. (3) Independent of the kernel: TRT-LLM's MLA rows carry two footnotes that constrain serving rather than correctness - chunked prefill for MLA only enables on SM90/SM100/SM103/SM107/SM120, and KV cache reuse for MLA only enables on SM90/100/103/107/120/121 in BF16/FP8 [[mdl2-trtllm-supported-models]]. (4) TRT-LLM states DeepSeek-V4 is Blackwell SM100+ only and Kimi K3 is SM100 family only, with a worked recipe split (DEP16 needs GB300-class per-GPU memory, TEP16 validated on GB200) [[mdl2-trtllm-supported-models]]. ISA CONSEQUENCE: at 68.6 KiB/token MLA moves the bottleneck off KV and onto weight streaming, so MLA-capable engines find their paged-attention machinery largely idle and their GQA-era cache-pressure tuning irrelevant [[mla-latent-attention]]. HARD BLOCKER, identical to the flash checkpoint: DeepSeek-V4 is Blackwell SM100+ only per TRT-LLM [[mdl2-trtllm-supported-models]], and the SM120 sparse-MLA page-block cluster applies to both V4 checkpoints [[sm120-sparse-mla-block-size]]. FlashMLA's current release removed V4.0 support as well [[kern-flashmla-github]]. CONTEXT_SCALING_METHOD (yarn): config-derived; the existing free text 'YaRN (factor 16, original 65536)' agrees. SCHEME RECLASSIFIED (2026-10-04): was 'MLA variant with compressed KV, kv_lora_rank absent from config'. Same shape as V4-Flash at a larger size: config has no kv_lora_rank, no qk_nope_head_dim, no v_head_dim; only qk_rope_head_dim 64, q_lora_rank 1024, o_lora_rank 1024, head_dim 512. compress_ratios has length 61 = num_hidden_layers with values 128 / 4 / 0: index 0 is 128, index 1 is 128, index 2 is 4, then alternating 4/128 through index 59, with index 60 back to 0. index_topk 1024, num_hash_layers 3, sliding_window 128.

Notes

KV GEOMETRY: kv_cache_bytes_per_token REMAINS NULL, and the reason is now precise rather than vague. The trap on this family is assuming MLA: config has NO kv_lora_rank, so the DeepSeek-V2/V3 latent formula (layers x (kv_lora_rank + qk_rope_head_dim) x 2) does not apply either. V4 instead declares a per-layer compress_ratios array of ints, which transformers maps to attention layer types via _COMPRESS_RATIO_TO_LAYER_TYPE: 0 -> sliding_attention (full 128-token sliding-window KV), 4 -> compressed_sparse_attention (CSA, compress_rate 4, plus a Lightning Indexer running its own compressor at index_head_dim 128 over the same windows), 128 -> heavily_compressed_attention (HCA, compress_rate 128, one compressed entry per 128 tokens). Flash: 1 sliding / 30 CSA / 31 HCA over 43 layers. Pro: 1 / 30 / 31 over 61. Why this is not derivable to a single number: every compressor layer retains its sliding-window KV PLUS a growing compressed-KV list PLUS (on CSA layers) a second indexer series plus a 2x-compress_rate_csa overlap buffer, and the three interleave. An exact figure needs the CSA/HCA overlap accounting in modeling_deepseek_v4.py, not config arithmetic. What IS safe to state: the naive GQA reading (num_layers x num_kv_heads 1 x head_dim 512 x 2 x 2 = 124,928 B/token, 122.0 KiB) is wrong because it charges every layer a full head_dim 512 K and V per token, while HCA layers charge head_dim x 2 x 2 / 128 per token - about 16.0 B/token/layer, a 128x reduction on 31 of the layers. So the naive figure OVERSTATES V4's KV, and the direction matters for serving: it would say V4-Flash needs 122.0 KiB/token when its compressed design is precisely what makes 1M context tractable. The 1.6T flagship of the V4 preview. Vendor: 1.6T total / 49B activated, 1M context, trained on 32T+ tokens; safetensors total 1598.84B. Config: 61 layers (same depth as V3), hidden 7168, 384 routed + 1 shared experts (up from V3's 256), 6 per token, moe_intermediate_size 3072, head_dim 512, num_key_value_heads 1, q_lora_rank 1536, YaRN factor 16 over 65536, sliding_window 128, index_topk 1024. kv_cache_bytes_per_token is null for the same reason as V4-Flash: no kv_lora_rank in the config, and the compressed-cache geometry is not derivable from the fields present. Released as FP4 + FP8 mixed (expert params in FP4), so the published weights are far below 1.6 TB. MIT.

SERVICEABILITY JOIN (added 2026-10-03; the architecture x engine matrix this record was missing, with a citation per cell in docs/13-model-compatibility.md): FAMILY=mla. REQUIRED KERNEL CLASS: an MLA decode kernel. MLA is not a variant of the GQA kernel - the cache is a shared low-rank latent (d_c) plus a decoupled RoPE key, not per-head K/V, so an engine that lacks a dedicated MLA decode path cannot serve the class at all. SUPPORTED BY (cited): vLLM native rows DeepseekV2ForCausalLM, DeepseekV3ForCausalLM, DeepseekV32ForCausalLM, DeepseekV4ForCausalLM [[mdl2-vllm-supported-models-2026-10]]; TensorRT-LLM the same four rows plus GlmMoeDsaForCausalLM (GLM-5), Glm4MoeForCausalLM (GLM-4.5/4.6/4.7), KimiK3ForConditionalGeneration and KimiLinearForCausalLM [[mdl2-trtllm-supported-models]]; SGLang generative table names DeepSeek v1/v2/v3/R1 and Kimi K2 as supported [[mdl2-sglang-generative-models]]; llama.cpp reaches MLA through the DEEPSEEK2/DEEPSEEK32/DEEPSEEK4 arch entries, which are in its supports_sm_tensor == false list, i.e. no tensor-core matmul path for the attention itself [[mdl2-llamacpp-arch-class-registry]]; ik-llama-cpp records MLA as a feature that landed there first and was later upstreamed [[ik-llama-cpp]].ENGINE KERNEL CONSTRAINTS THAT CHANGE WHAT THE ENGINE MUST STORE (this is the important class of fact): (1) FlashInfer, which is SGLang's default attention backend and selectable in vLLM [[flashinfer]], is where the MLA decode kernels live, and they are instantiated per KV cache page-block size: gotcha-sm120-sparse-mla-block-size records vLLM computing compressed-layer pbs = block_size // compress_ratio (= 32 at block_size 64 for a ratio-2 layer) while FlashInfer's SM120 planner hard-codes _PAGE_BLOCK_SIZE = 64, so DeepSeek-V4.1-Flash will not start on 8x RTX PRO 6000 at TP8 at ANY global block size (64 gives pbs=32 and crashes; 128 gives 'No common block size'). Workaround is SM100 datacenter Blackwell or a FlashInfer planner change. (2) FlashMLA's 2026.09.30 release requires SM100/SM103 and CUDA >= 13.1, REMOVED Hopper support and removed V3/V3.2/V4.0, and supports ONLY FP8 and FP4 KV cache - unquantized bfloat16 KV is explicitly not supported [[kern-flashmla-github]]. So the kernel choice decides the KV CACHE FORMAT: to use that decode kernel the engine must store an FP8/FP4 latent with per-token inlined scales, and V4.1's layout is 528 bytes/token (512 of float8_e4m3 over all 512 dims - the 64 RoPE dims are quantized too, no bf16 part - plus 16 bytes of float8_e8m0 scales, one per 32 e4m3 values), with an fp4 variant at 288 bytes/token [[flashmla-decode-fp8-fp4-kv]]. A Hopper box therefore cannot take that kernel and an engine that only offers bf16 MLA KV cannot take it either. (3) Independent of the kernel: TRT-LLM's MLA rows carry two footnotes that constrain serving rather than correctness - chunked prefill for MLA only enables on SM90/SM100/SM103/SM107/SM120, and KV cache reuse for MLA only enables on SM90/100/103/107/120/121 in BF16/FP8 [[mdl2-trtllm-supported-models]]. (4) TRT-LLM states DeepSeek-V4 is Blackwell SM100+ only and Kimi K3 is SM100 family only, with a worked recipe split (DEP16 needs GB300-class per-GPU memory, TEP16 validated on GB200) [[mdl2-trtllm-supported-models]]. ISA CONSEQUENCE: at 68.6 KiB/token MLA moves the bottleneck off KV and onto weight streaming, so MLA-capable engines find their paged-attention machinery largely idle and their GQA-era cache-pressure tuning irrelevant [[mla-latent-attention]]. HARD BLOCKER, identical to the flash checkpoint: DeepSeek-V4 is Blackwell SM100+ only per TRT-LLM [[mdl2-trtllm-supported-models]], and the SM120 sparse-MLA page-block cluster applies to both V4 checkpoints [[sm120-sparse-mla-block-size]]. FlashMLA's current release removed V4.0 support as well [[kern-flashmla-github]].

CONTEXT_SCALING_METHOD (yarn): config-derived; the existing free text 'YaRN (factor 16, original 65536)' agrees.

SCHEME RECLASSIFIED (2026-10-04): was 'MLA variant with compressed KV, kv_lora_rank absent from config'. Same shape as V4-Flash at a larger size: config has no kv_lora_rank, no qk_nope_head_dim, no v_head_dim; only qk_rope_head_dim 64, q_lora_rank 1024, o_lora_rank 1024, head_dim 512. compress_ratios has length 61 = num_hidden_layers with values 128 / 4 / 0: index 0 is 128, index 1 is 128, index 2 is 4, then alternating 4/128 through index 59, with index 60 back to 0. index_topk 1024, num_hash_layers 3, sliding_window 128.

Cross-references

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