GGUF IQ2_S (2.5625 bpw, non-linear 2-bit with a 4-bit scale per 64 and sign/high-bit planes)

CORRECTED 2026-10-04: was 32 (correct) - now with a kernel basis. dequantize_row_iq2_s applies TWO 4-bit sub-scales per 32 values (`db[0]=d*(0.5+(scales[ib32]&0xf))*0.25; db[1]=d*(0.5+(scales[ib32]>>4))*0.25` for ib32 < QK_K/32), so 16 sub-scales per 256-value super-block, two per 32. IMPORTANT STRUCTURAL CAVEAT that the struct alone gets wrong: block_iq2_s declares `uint8_t scales[QK_K/32]` = 8 bytes, but the static_assert says `QK_K/4 + QK_K/16 + sizeof(half)` = 64+16+2 = 82. The QK_K/16 in the assert is BITS not bytes - 8 bytes holds 8 four-bit scales. The kernel, not the array declaration, is what settles it. SCHEMA MISMATCH: there is no ggml/iq* value in the quantization scheme enum, so this record uses the closest existing value 'gguf-q4_k_m' (or 'gguf-q2_k') and puts the true type in `name` and `bits`. Requested enum additions are listed in the task report. Weight-only by construction: activations are promoted to q8_K (an intermediate dot-product format, not a storage format) and the matmul runs at fp16/bf16, so native_support is deliberately EMPTY and the whole accelerator ecosystem is emulated_support. No accelerator has an i-quant or k-quant path in silicon. COMMON TO ALL IQ-QUANTS, verified from ggml/src/ggml-common.h: they use the QK_K = 256 super-block like the K-quants, but instead of a UNIFORM integer grid they quantize to indices into a per-block CODEBOOK of 256 learned non-uniform 4-bit values (the 'i' in i-quant is for the codebook grid / i-quant from the ik_llama.cpp lineage). The index lookup is table-driven at dequant time, which is why they compress better than K-quants at the same nominal bits and why they dequantize more slowly - the dot product needs a gather from the codebook. This is a real throughput trade, not a free win. BACKEND SITUATION, verified: the CUDA library shipped in llamafile releases is size-optimized and OMITS the IQ-quant kernels (IQ1_*, IQ2_*, IQ3_*, IQ4_*); offloading an IQ-quantized model to an NVIDIA GPU therefore leaves those layers on the CPU with correct output but no GPU acceleration (qlab2-llamafile-support-docs). The Metal and ROCm builds are NOT size-optimized and include full IQ-quant GPU support - so an RX 7900 XTX on ROCm/HIP is in a materially better IQ position than an RTX 4090 on a stock llamafile build. Vulkan has no dedicated IQ-quant path. Upstream llama.cpp has per-type dequant kernels; ik_llama.cpp additionally ships the Trellis family (IQ1_KT/IQ2_KT/IQ3_KT/IQ4_KT, integer-base trellis, CUDA PR 113 / Metal PR 475 / NEON PR 471 / CPU PR 441) and _R4/_R16 row-interleaved variants. block_iq2_s = { ggml_half d; uint8_t qs[QK_K/4] (64 bytes, low index bits); uint8_t qh[QK_K/32] (8 bytes, high index bit, 4 per byte); uint8_t scales[QK_K/32] (8 bytes, 4-bit sub-block scales, one per 32 elements) } = 82 bytes / 256 = 2.5625 bpw, matching the '2.5625 bpw quants' comment. Note the static_assert spells the size as QK_K/4 + QK_K/16 + sizeof(half) = 64 + 16 + 2 = 82, i.e. the scales[] array is QK_K/32 = 8 bytes holding FOUR-BIT scales (2 per byte) for 8 sub-blocks - the QK_K/16 in the assert is bits, not bytes. IQ2_S IS THE PROMOTION TARGET for LLAMA_FTYPE_MOSTLY_IQ2_M: llama_tensor_get_quant_type maps IQ2_M to GGML_TYPE_IQ2_S, so IQ2_M is a mixture built on iq2_s. For 8-expert models, IQ2_S/IQ2_M promote to IQ3_S instead, because Mixtral experts will not take 2-bit. SCHEME RECLASSIFIED (parent agent, 2026-10-03): scheme was 'gguf-q2_k' (a proxy recorded while the enum lacked a legal value) and is now 'gguf-iq2-s'. NATIVE_SUPPORT CLASSIFIED 2026-10-04: this field is still [] and that is CORRECT, but the empty list used to be ambiguous between three different states and now is not. Reason class on this record: LLAMA.CPP INTEGER STORAGE TYPE, SO STRUCTURALLY ABSENT. Every GGUF type here is a packed integer block format read by a dequant kernel (dequantize_row_*) and then executed as FP16; ggml publishes no int4 or sub-8-bit tensor-core path that consumes these blocks directly. The llama.cpp CUDA and Vulkan backends both run these formats by dequantizing. Consequence for a reader: nothing further to verify - and note the contrast with nvfp4/mxfp4/mxfp8 in this repo, which ARE hardware formats on Blackwell and carry populated native_support lists, so '4-bit' alone does not predict this field. The full statement of the three-way distinction, and the worked list of all 72 empty records by class, is in gotcha quant-native-support-empty-means-three-different-things. Rule of thumb for this field everywhere in the repo: if the bits field carries an 'a16', or the scheme is KV-cache-only or a llama.cpp integer storage type, an empty native_support is a DEFINITION and needs no verification; only a W4A4/W8A8/sub-8-bit format with research kernels can have an empty list that is a real finding.