id
accelerators/nvidia-rtx-4090
Memory bandwidth (GB/s)
1,008
Bandwidth basis
GDDR6X 21 Gbps data rate x 384-bit / 8 = 1008 GB/s (NVIDIA Ada whitepaper Appendix A: 'Memory Clock (Data Rate) 21 Gbps', 'Memory Bandwidth 1008 GB/sec')
Peak FLOPS
precisionfp32tflops82.6denseyesvendor_claimyessource_idconsumer-nvidia-ada-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own fp32 for NVIDIA GeForce RTX 4090 (source of record: 'NVIDIA Ada GPU Architecture whitepaper v2.02', kind: whitepaper). Recorded dense:true as printed.precisionfp16tflops165.2denseyesvendor_claimyessource_idconsumer-nvidia-ada-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own fp16 for NVIDIA GeForce RTX 4090 (source of record: 'NVIDIA Ada GPU Architecture whitepaper v2.02', kind: whitepaper). Recorded dense:true as printed.precisionbf16tflops165.2denseyesvendor_claimyessource_idconsumer-nvidia-ada-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own bf16 for NVIDIA GeForce RTX 4090 (source of record: 'NVIDIA Ada GPU Architecture whitepaper v2.02', kind: whitepaper). Recorded dense:true as printed.precisionbf16tflops330.4densenovendor_claimyessource_idconsumer-nvidia-ada-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own bf16 for NVIDIA GeForce RTX 4090 (source of record: 'NVIDIA Ada GPU Architecture whitepaper v2.02', kind: whitepaper). Recorded dense:false - the vendor prints this as a structured-sparsity figure; the dense companion row on this record is the halved value. See this record's notes for the sparsity-footnote rule.precisiontf32tflops82.6denseyesvendor_claimyessource_idconsumer-nvidia-ada-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own tf32 for NVIDIA GeForce RTX 4090 (source of record: 'NVIDIA Ada GPU Architecture whitepaper v2.02', kind: whitepaper). Recorded dense:true as printed.precisiontf32tflops165.2densenovendor_claimyessource_idconsumer-nvidia-ada-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own tf32 for NVIDIA GeForce RTX 4090 (source of record: 'NVIDIA Ada GPU Architecture whitepaper v2.02', kind: whitepaper). Recorded dense:false - the vendor prints this as a structured-sparsity figure; the dense companion row on this record is the halved value. See this record's notes for the sparsity-footnote rule.precisionfp8tflops330.3denseyesvendor_claimyessource_idconsumer-nvidia-ada-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own fp8 for NVIDIA GeForce RTX 4090 (source of record: 'NVIDIA Ada GPU Architecture whitepaper v2.02', kind: whitepaper). Recorded dense:true as printed.precisionfp8tflops660.6densenovendor_claimyessource_idconsumer-nvidia-ada-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own fp8 for NVIDIA GeForce RTX 4090 (source of record: 'NVIDIA Ada GPU Architecture whitepaper v2.02', kind: whitepaper). Recorded dense:false - the vendor prints this as a structured-sparsity figure; the dense companion row on this record is the halved value. See this record's notes for the sparsity-footnote rule.precisionint8tflops660.6denseyesvendor_claimyessource_idconsumer-nvidia-ada-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own int8 for NVIDIA GeForce RTX 4090 (source of record: 'NVIDIA Ada GPU Architecture whitepaper v2.02', kind: whitepaper). Recorded dense:true as printed.precisionint8tflops1,321.2densenovendor_claimyessource_idconsumer-nvidia-ada-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own int8 for NVIDIA GeForce RTX 4090 (source of record: 'NVIDIA Ada GPU Architecture whitepaper v2.02', kind: whitepaper). Recorded dense:false - the vendor prints this as a structured-sparsity figure; the dense companion row on this record is the halved value. See this record's notes for the sparsity-footnote rule.precisionint4tflops1,321.2denseyesvendor_claimyessource_idconsumer-nvidia-ada-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own int4 for NVIDIA GeForce RTX 4090 (source of record: 'NVIDIA Ada GPU Architecture whitepaper v2.02', kind: whitepaper). Recorded dense:true as printed.precisionint4tflops2,642.4densenovendor_claimyessource_idconsumer-nvidia-ada-gpu-architecture-whitepaperbasisvendor-whitepaperbasis_detailTranscribed from the vendor's own int4 for NVIDIA GeForce RTX 4090 (source of record: 'NVIDIA Ada GPU Architecture whitepaper v2.02', kind: whitepaper). Recorded dense:false - the vendor prints this as a structured-sparsity figure; the dense companion row on this record is the halved value. See this record's notes for the sparsity-footnote rule.
notes
AUDIT 2026-10-03 (NVIDIA dense/sparse convention re-verified from the primary Ada whitepaper PDF, no values changed): NVIDIA's Ada GPU architecture whitepaper prints its consumer spec tables in the same 'DENSE/SPARSE' form with the footnote 'Effective TOPS / TFLOPS using the Sparsity Feature'. AD102 appendix: 'Peak FP16 Tensor TFLOPS with FP16 Accumulate 330.3/660.6', 'Peak FP16 Tensor TFLOPS with FP32 Accumulate 165.2/330.4', 'Peak BF16 Tensor TFLOPS with FP32 Accumulate 165.2/330.4', 'Peak TF32 Tensor TFLOPS 82.6/165.2', 'Peak INT8 Tensor TOPS 660.6/1321.2', 'Peak INT4 Tensor TOPS 1321.2/2642.4'. So the five dense:false rows on this record - bf16 330.4, tf32 165.2, fp8 660.6, int8 1321.2, int4 2642.4 - are each the SPARSE column of the printed pair, with the dense twin stored separately. Correct. The fp8 660.6 row is the paper's 'FP16 with FP16 accumulate' rate; Ada has no native FP8 accumulate path, which is why this figure equals the FP16-accumulate FP16 number rather than half of it.
INTERCONNECT FILLED 2026-10-04: interconnect was empty; it now reads ['pcie-gen4'], from the vendor's own spec table (source the GeForce RTX 4090 product page's 'Technology Support' row). SCALE-UP IS ABSENT AND THAT IS THE POINT: this part has no NVLink and no other GPU-to-GPU fabric, so the host link is the ONLY interconnect a multi-GPU deployment has. Do not infer a fabric from the presence of a PCIe value, and do not read the Gen number as a multi-GPU capability.