inference/research
verifiedhigh · 0.95updated 2026-10-04

TPU7x (Ironwood) system architecture

spec-sheet

Fields

id
sources/alt-tpu7x-ironwood
URL
https://cloud.google.com/tpu/docs/tpu7x
Publisher
Google Cloud
Kind
spec-sheet
Published
2026-10-02
Accessed
2026-10-04
notes
Dual-chiplet architecture, 2 TensorCores per chip, 2307 BF16 / 4614 FP8 TFLOPS per chip, 192 GB HBM at 7380 GB/s, 9216-chip pod, D2D 6x faster than ICI, vLLM tpu-inference plugin.

Notes

Dual-chiplet architecture, 2 TensorCores per chip, 2307 BF16 / 4614 FP8 TFLOPS per chip, 192 GB HBM at 7380 GB/s, 9216-chip pod, D2D 6x faster than ICI, vLLM tpu-inference plugin.

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