TPU v4: An Optically Reconfigurable Supercomputer for Machine Learning with Hardware Support for Embeddings
paper
Fields
id
sources/asic-tpu-v4-paperPublisher
Google / arXiv
Kind
paper
Published
2021-04-03
Accessed
2026-10-03
notes
Architecture paper for v4: Cmem SRAM tier, MXU design, optical circuit switching.
Notes
Architecture paper for v4: Cmem SRAM tier, MXU design, optical circuit switching.
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