inference/research
verifiedhigh · 0.90updated 2026-10-03

NVIDIA A100 Tensor Core GPU Architecture white paper

whitepaper

Fields

id
sources/link2-nvidia-ampere-architecture-whitepaper
Publisher
NVIDIA
Kind
whitepaper
Published
2020-05-14
Accessed
2026-10-03
notes
First-party NVIDIA architecture white paper for A100 / Ampere. Contains the only first-party statement of NVLink's link-layer structure across two generations: 'Third-generation NVLink has a data rate of 50 Gbit/sec per signal pair, nearly doubling the 25.78 Gbits/sec rate in V100. A single A100 NVLink provides 25 GB/second bandwidth in each direction similar to V100, but using only half the number of signal pairs per link compared to V100. The total number of links is increased to twelve in A100, versus 6 in V100, yielding 600 GB/sec total bandwidth versus 300 GB/sec for V100.' That is the source for both the 25 GB/s per-direction per-link rate and the 6-vs-12 link counts used in nvlink-2 and nvlink-3. Also states the NVSwitch scale-out story for A100 systems and the A100's 40 GB HBM2 / 2 TB/s memory figures.

Notes

First-party NVIDIA architecture white paper for A100 / Ampere. Contains the only first-party statement of NVLink's link-layer structure across two generations: 'Third-generation NVLink has a data rate of 50 Gbit/sec per signal pair, nearly doubling the 25.78 Gbits/sec rate in V100. A single A100 NVLink provides 25 GB/second bandwidth in each direction similar to V100, but using only half the number of signal pairs per link compared to V100. The total number of links is increased to twelve in A100, versus 6 in V100, yielding 600 GB/sec total bandwidth versus 300 GB/sec for V100.' That is the source for both the 25 GB/s per-direction per-link rate and the 6-vs-12 link counts used in nvlink-2 and nvlink-3. Also states the NVSwitch scale-out story for A100 systems and the A100's 40 GB HBM2 / 2 TB/s memory figures.

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