Iluvatar CoreX BI-V100 (Tiangai 100) product page publishes TWO 64 GB/s figures under one 接口 row - host-controller bandwidth AND inter-chip bandwidth - both labelled 双向; the chip-to-chip one is a real scale-up figure and had no interconnect record

VERBATIM 2026-10-05 from the 产品规格 table, fetched fresh: 接口 PCIe Gen4.0 x 16 lane 共享 64 GB/s 主控双向带宽 共享 64 GB/s 片间互联带宽 TRANSLATION, which is the whole content of this source: 'PCIe Gen4.0 x 16 lane'; 'shared 64 GB/s host-controller BIDIRECTIONAL bandwidth'; 'shared 64 GB/s inter-chip (die-to-die) interconnect bandwidth'. 共享 = 'shared', 主控 = 'host controller', 片间互联 = 'inter-chip interconnect', 双向 = 'bidirectional'. WHY THIS MATTERS AND WHY IT WAS MISSED. data/accelerators/iluvatar-bi-v100-mr-v100 lists interconnect ['pcie-gen4'] and nothing else, and its memory_bandwidth_basis explicitly reasons 'the vendor prints the same 64 GB/s figure for host and device links and it is therefore an interconnect number, not memory bandwidth' - so the repo already KNEW there were two 64 GB/s figures and had correctly declined to mistake either for a memory bandwidth. What was missing is that one of them (片间互联, inter-chip interconnect) is a SCALE-UP FABRIC figure in its own right, named by the vendor, and had no interconnect record at all. Interconnect/iluvatar-bi-v100-chip-to-chip now holds it. THE 64 GB/s IS BIDIRECTIONAL, stated by the vendor's own word 双向 on both figures. That makes it directly comparable to the aggregate convention Cambricon uses for MLU-Link ('聚合带宽200GB/s Bi-direction') and puts it on the same side of the corpus-wide per-direction-vs-aggregate split as every other vendor that bothers to say. Per direction it is 32 GB/s. WHAT THE PAGE STILL DOES NOT PUBLISH, confirmed again on this fetch: no memory bandwidth, no bus width, no pin rate, no compute figure of any precision. '内存 | 32 GB DRAM HBM2' is still the only memory string. Recorded so the absence stays an absence rather than drifting into 'probably around'. The page also publishes 功耗 板级功耗 250W and 尺寸 全长全高双槽 PCIe 卡, both already reflected in the accelerator record.