inference/research
verifiedhigh · 0.95updated 2026-10-05

PCI-SIG press release, 'PCI-SIG Releases PCIe 7.0 Specification to Support the Bandwidth Demands of Artificial Intelligence at 128.0 GT/s Transfer Rates' (11 June 2025)

spec-sheet

Fields

id
sources/w7p-pcisig-pcie7-release-pr
Publisher
PCI-SIG (distributed via Business Wire)
Kind
spec-sheet
Published
2025-06-11
Accessed
2026-10-05
notes
RETRIEVED AND TRANSCRIBED VERBATIM 2026-10-05. The FINAL RELEASE announcement for PCIe 7.0 - i.e. 7.0 is a published specification, not a preview. Use this source (not the 2022 announcement) for revision status. Features list, verbatim: - 'Delivers 128.0 GT/s raw bit rate and up to 512 GB/s BI-DIRECTIONALLY via x16 configuration' - 'Utilizes PAM4 (Pulse Amplitude Modulation with 4 levels) signaling and Flit-based encoding' - 'Provides improved power efficiency' - 'Maintains backwards compatibility with previous generations of PCIe technology' Body, verbatim: 'PCI-SIG ... today announced the official release of the PCI Express (PCIe) 7.0 specification, reaching 128.0 GT/s, to members. PCIe 7.0 specification targets data-driven applications like AI/ML, 800G Ethernet, cloud, and Quantum computing. Pathfinding for the PCIe 8.0 specification is already in progress.' DIRECTION, stated EXPLICITLY: 'bi-directionally'. So 512 GB/s at x16 is the BIDIRECTIONAL RAW figure and the per-direction raw figure is 256.0 GB/s. Arithmetic confirms: 16 lanes x 128 GT/s / 8 = 256.0 GB/s per direction, x2 = 512.0. This is the same convention and the same wording as PCIe 6.0's '256.0 GB/s bidirectional' in w7p-pcisig-pcie6-faq, one generation up - so the convention is stable across the PAM4 generations and PCI-SIG did not silently change it. Al Yanes, PCI-SIG President, verbatim: 'which continues our long-standing tradition of doubling the IO bandwidth every three years' - i.e. PCI-SIG itself frames every generation as a 2x, which is true of the RAW BIDIRECTIONAL ladder (256 -> 512) and also true of Gen7's PAYLOAD per direction (121.0 -> 242.0), but is NOT true of Gen5 -> Gen6 payload per direction (63.0 -> 121.0, a ratio of 1.92). Anyone checking the 'doubles every three years' claim against payload figures will find Gen5->Gen6 off by 4%; that discrepancy is the flit framing change, not an error in either number. Ian Cutress, More Than Moore, verbatim: 'Datacenters are ready to start deploying networks built on PCIe 7.0 technology, and almost every ASIC company I talk to is already engaged with the IP providers'. Useful only as deployment-intent colour, not as a bandwidth claim.

Notes

RETRIEVED AND TRANSCRIBED VERBATIM 2026-10-05. The FINAL RELEASE announcement for PCIe 7.0 - i.e. 7.0 is a published specification, not a preview. Use this source (not the 2022 announcement) for revision status.

Features list, verbatim: - 'Delivers 128.0 GT/s raw bit rate and up to 512 GB/s BI-DIRECTIONALLY via x16 configuration' - 'Utilizes PAM4 (Pulse Amplitude Modulation with 4 levels) signaling and Flit-based encoding' - 'Provides improved power efficiency' - 'Maintains backwards compatibility with previous generations of PCIe technology'

Body, verbatim: 'PCI-SIG ... today announced the official release of the PCI Express (PCIe) 7.0 specification, reaching 128.0 GT/s, to members. PCIe 7.0 specification targets data-driven applications like AI/ML, 800G Ethernet, cloud, and Quantum computing. Pathfinding for the PCIe 8.0 specification is already in progress.'

DIRECTION, stated EXPLICITLY: 'bi-directionally'. So 512 GB/s at x16 is the BIDIRECTIONAL RAW figure and the per-direction raw figure is 256.0 GB/s. Arithmetic confirms: 16 lanes x 128 GT/s / 8 = 256.0 GB/s per direction, x2 = 512.0. This is the same convention and the same wording as PCIe 6.0's '256.0 GB/s bidirectional' in w7p-pcisig-pcie6-faq, one generation up - so the convention is stable across the PAM4 generations and PCI-SIG did not silently change it.

Al Yanes, PCI-SIG President, verbatim: 'which continues our long-standing tradition of doubling the IO bandwidth every three years' - i.e. PCI-SIG itself frames every generation as a 2x, which is true of the RAW BIDIRECTIONAL ladder (256 -> 512) and also true of Gen7's PAYLOAD per direction (121.0 -> 242.0), but is NOT true of Gen5 -> Gen6 payload per direction (63.0 -> 121.0, a ratio of 1.92). Anyone checking the 'doubles every three years' claim against payload figures will find Gen5->Gen6 off by 4%; that discrepancy is the flit framing change, not an error in either number.

Ian Cutress, More Than Moore, verbatim: 'Datacenters are ready to start deploying networks built on PCIe 7.0 technology, and almost every ASIC company I talk to is already engaged with the IP providers'. Useful only as deployment-intent colour, not as a bandwidth claim.

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