inference/research
verifiedhigh · 0.90updated 2026-10-03

AMD Radeon RX 9070 XT

amd rdna4 (Navi 48, gfx1201) 2025

Fields

id
accelerators/amd-radeon-rx-9070-xt
Vendor
amd
Architecture
rdna4 (Navi 48, gfx1201)
Release year
2025
Process (nm)
4
Form factors
pcie
VRAM (GB)
16
Memory type
gddr6
Memory bus (bit)
256
Memory bandwidth (GB/s)
640
Bandwidth basis
AMD product page prints all three numbers directly: 'Memory Speed Up to 20 Gbps', 'Memory Interface 256-bit', 'Memory Bandwidth Up to 640 GB/s'. 20 Gbps x 256-bit / 8 = 640 GB/s, so the aggregate is consistent with the printed rate and width and is quoted rather than re-derived. Unlike the RX 7900 XTX page, this one does print a Memory Interface row. No Infinity-Cache-inclusive 'effective bandwidth' row appears on this page, so there is no competing figure to disambiguate.
Peak FLOPS
precisionfp32tflops48.7denseyesvendor_claimyessource_idacc-fill-amd-radeon-rx-9070xt-product-pagebasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own fp32 for AMD Radeon RX 9070 XT (source of record: 'AMD Radeon RX 9070 XT product specifications page', kind: spec-sheet). Recorded dense:true as printed.precisionfp16tflops48.7denseyesvendor_claimyessource_idacc-fill-amd-radeon-rx-9070xt-product-pagebasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own fp16 for AMD Radeon RX 9070 XT (source of record: 'AMD Radeon RX 9070 XT product specifications page', kind: spec-sheet). Recorded dense:true as printed.precisionfp16tflops195denseyesvendor_claimyessource_idacc-fill-amd-radeon-rx-9070xt-product-pagebasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own fp16 for AMD Radeon RX 9070 XT (source of record: 'AMD Radeon RX 9070 XT product specifications page', kind: spec-sheet). Recorded dense:true as printed.precisionfp16tflops389densenovendor_claimyessource_idacc-fill-amd-radeon-rx-9070xt-product-pagebasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own fp16 for AMD Radeon RX 9070 XT (source of record: 'AMD Radeon RX 9070 XT product specifications page', kind: spec-sheet). Recorded dense:false - the vendor prints this as a structured-sparsity figure; the dense companion row on this record is the halved value. See this record's notes for the sparsity-footnote rule.precisionfp8tflops389denseyesvendor_claimyessource_idacc-fill-amd-radeon-rx-9070xt-product-pagebasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own fp8 for AMD Radeon RX 9070 XT (source of record: 'AMD Radeon RX 9070 XT product specifications page', kind: spec-sheet). Recorded dense:true as printed.precisionfp8tflops779densenovendor_claimyessource_idacc-fill-amd-radeon-rx-9070xt-product-pagebasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own fp8 for AMD Radeon RX 9070 XT (source of record: 'AMD Radeon RX 9070 XT product specifications page', kind: spec-sheet). Recorded dense:false - the vendor prints this as a structured-sparsity figure; the dense companion row on this record is the halved value. See this record's notes for the sparsity-footnote rule.precisionint8tflops389denseyesvendor_claimyessource_idacc-fill-amd-radeon-rx-9070xt-product-pagebasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own int8 for AMD Radeon RX 9070 XT (source of record: 'AMD Radeon RX 9070 XT product specifications page', kind: spec-sheet). Recorded dense:true as printed.precisionint8tflops779densenovendor_claimyessource_idacc-fill-amd-radeon-rx-9070xt-product-pagebasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own int8 for AMD Radeon RX 9070 XT (source of record: 'AMD Radeon RX 9070 XT product specifications page', kind: spec-sheet). Recorded dense:false - the vendor prints this as a structured-sparsity figure; the dense companion row on this record is the halved value. See this record's notes for the sparsity-footnote rule.precisionint4tflops779denseyesvendor_claimyessource_idacc-fill-amd-radeon-rx-9070xt-product-pagebasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own int4 for AMD Radeon RX 9070 XT (source of record: 'AMD Radeon RX 9070 XT product specifications page', kind: spec-sheet). Recorded dense:true as printed.precisionint4tflops1,557densenovendor_claimyessource_idacc-fill-amd-radeon-rx-9070xt-product-pagebasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own int4 for AMD Radeon RX 9070 XT (source of record: 'AMD Radeon RX 9070 XT product specifications page', kind: spec-sheet). Recorded dense:false - the vendor prints this as a structured-sparsity figure; the dense companion row on this record is the halved value. See this record's notes for the sparsity-footnote rule.
TDP (W)
304
Unified memory
no
Consumer part
yes
notes
First RDNA 4 consumer card: 64 CUs, 4096 stream processors, 64 ray accelerators, 128 AI accelerators, 2970 MHz boost / 2400 MHz game, 53.9 B transistors, 16 GB GDDR6 at 20 Gbps on a 256-bit bus = 640 GB/s, 64 MB Infinity Cache, 304 W typical board power, PCIe 5.0 x16, 2x8-pin power, DP 2.1a / HDMI 2.1b, TPP 3114. gfx1201 in ROCm terms, and AMD's ROCm compatibility matrix lists 'AMD Radeon RX 9070 XT | gfx1201' as supported. Architecture binding is AMD's own: 'the latest AMD RDNA 4 architecture ... featured in the AMD Radeon RX 9000 Series graphics' and AMD's generation table gives RDNA 4 as 4 nm with 4th-gen compute units, 3rd-gen raytracing and 2nd-gen AI engine (acc-fill-amd-rdna-architecture-page). Note this product page carries an 'Artist render. Not available for purchase.' caption on its hero image - it is a board-partner product, which is normal for this class. IT IS RDNA, NOT CDNA - the single most consequential thing about this record. RDNA is AMD's consumer/workstation graphics architecture; CDNA is the Instinct datacentre architecture, and they are different silicon families with different matrix-instruction sets, different ROCm kernel dispatch, and different supported quantization paths. Every Instinct record in this directory (MI210, MI250X, MI300X, MI355X) is CDNA and must not be compared to this row-for-row. Concretely: the ROCm ecosystem treats gfx1201 differently from CDNA targets, and the vLLM AITER gate in gotcha aiter-gate-skips-rdna3-gfx1100 shows the pattern - its CDNA path is gated on 'CDNA3-or-newer' while the RDNA path is gated on gfx1201 ONLY. gfx1201 being named there is the practical consequence of RDNA4 being the generation AITER's RDNA gate admits. RDNA4's AI-SPECIFIC INSTRUCTIONS ARE REAL BUT NOT A CDNA MATRIX CORE. AMD's page gives 'AI Accelerators 128' and the architecture page calls it a '2nd Generation AI' engine, with the first generation arriving in RDNA 3. These are integrated AI accelerators with dedicated packed-FP16/FP8/INT8/INT4 matrix support in the unified compute unit - they are not a separate CDNA-style matrix engine, they are part of the CU. The practical upshot for this repo is that a llama.cpp or vLLM tok/s figure on an RDNA4 card is a statement about the ROCm software path as much as the silicon, because the WGMMA/WMMA and __byte_perm lowering issues documented in benchmarks/llamacpp-radeon-r9700-gfx1201-q1-0-decode-tok-s are path artefacts, not hardware limits. DENSE vs SPARSE IS EXPLICIT HERE, unlike RDNA 3. AMD's page prints paired rows and names the sparse ones: 'Peak Half Precision (FP16 Matrix) Performance 195 TFLOPs' against '... with Structured Sparsity 389 TFLOPs'; FP8 (E5M2, E4M3) 389 against 779 with sparsity; INT8 389 TOPs against 779 with sparsity; INT4 779 against 1557 with sparsity. The dense rows are flagged dense:true and the 'with Structured Sparsity' rows dense:false, so nothing here can be misread as a 2x-dense figure. AMD also names the FP8 formats - E5M2 and E4M3 - which is why this is the first Radeon record in the directory to carry an fp8 row at all; the RDNA 3 RX 7900 XTX has no FP8 path. INFERENCE RELEVANCE, and the awkward comparison: this card has MORE peak matrix throughput than the RX 7900 XTX (195 vs 123 dense FP16 matrix TFLOPS) and native FP8, but LESS memory bandwidth (640 vs 960 GB/s) and two-thirds the VRAM (16 vs 24 GB). Batch-1 decode is bandwidth-bound, so the older, wider 7900 XTX decodes faster per token despite the newer card's compute advantage; the 9070 XT wins on prefill, on FP8/INT8 throughput, and on fitting a larger model in 16 GB. For LLM work the deciding question is which side of the roofline the workload sits on, and at 640 GB/s this card is 25% below an RTX 4090's 1008 GB/s while also having less VRAM - a combination that makes it a poor value-for-decode card and a decent prefill/preprocessing card.

Notes

First RDNA 4 consumer card: 64 CUs, 4096 stream processors, 64 ray accelerators, 128 AI accelerators, 2970 MHz boost / 2400 MHz game, 53.9 B transistors, 16 GB GDDR6 at 20 Gbps on a 256-bit bus = 640 GB/s, 64 MB Infinity Cache, 304 W typical board power, PCIe 5.0 x16, 2x8-pin power, DP 2.1a / HDMI 2.1b, TPP 3114. gfx1201 in ROCm terms, and AMD's ROCm compatibility matrix lists 'AMD Radeon RX 9070 XT | gfx1201' as supported. Architecture binding is AMD's own: 'the latest AMD RDNA 4 architecture ... featured in the AMD Radeon RX 9000 Series graphics' and AMD's generation table gives RDNA 4 as 4 nm with 4th-gen compute units, 3rd-gen raytracing and 2nd-gen AI engine (acc-fill-amd-rdna-architecture-page). Note this product page carries an 'Artist render. Not available for purchase.' caption on its hero image - it is a board-partner product, which is normal for this class.

IT IS RDNA, NOT CDNA - the single most consequential thing about this record. RDNA is AMD's consumer/workstation graphics architecture; CDNA is the Instinct datacentre architecture, and they are different silicon families with different matrix-instruction sets, different ROCm kernel dispatch, and different supported quantization paths. Every Instinct record in this directory (MI210, MI250X, MI300X, MI355X) is CDNA and must not be compared to this row-for-row. Concretely: the ROCm ecosystem treats gfx1201 differently from CDNA targets, and the vLLM AITER gate in gotcha aiter-gate-skips-rdna3-gfx1100 shows the pattern - its CDNA path is gated on 'CDNA3-or-newer' while the RDNA path is gated on gfx1201 ONLY. gfx1201 being named there is the practical consequence of RDNA4 being the generation AITER's RDNA gate admits.

RDNA4's AI-SPECIFIC INSTRUCTIONS ARE REAL BUT NOT A CDNA MATRIX CORE. AMD's page gives 'AI Accelerators 128' and the architecture page calls it a '2nd Generation AI' engine, with the first generation arriving in RDNA 3. These are integrated AI accelerators with dedicated packed-FP16/FP8/INT8/INT4 matrix support in the unified compute unit - they are not a separate CDNA-style matrix engine, they are part of the CU. The practical upshot for this repo is that a llama.cpp or vLLM tok/s figure on an RDNA4 card is a statement about the ROCm software path as much as the silicon, because the WGMMA/WMMA and __byte_perm lowering issues documented in benchmarks/llamacpp-radeon-r9700-gfx1201-q1-0-decode-tok-s are path artefacts, not hardware limits.

DENSE vs SPARSE IS EXPLICIT HERE, unlike RDNA 3. AMD's page prints paired rows and names the sparse ones: 'Peak Half Precision (FP16 Matrix) Performance 195 TFLOPs' against '... with Structured Sparsity 389 TFLOPs'; FP8 (E5M2, E4M3) 389 against 779 with sparsity; INT8 389 TOPs against 779 with sparsity; INT4 779 against 1557 with sparsity. The dense rows are flagged dense:true and the 'with Structured Sparsity' rows dense:false, so nothing here can be misread as a 2x-dense figure. AMD also names the FP8 formats - E5M2 and E4M3 - which is why this is the first Radeon record in the directory to carry an fp8 row at all; the RDNA 3 RX 7900 XTX has no FP8 path.

INFERENCE RELEVANCE, and the awkward comparison: this card has MORE peak matrix throughput than the RX 7900 XTX (195 vs 123 dense FP16 matrix TFLOPS) and native FP8, but LESS memory bandwidth (640 vs 960 GB/s) and two-thirds the VRAM (16 vs 24 GB). Batch-1 decode is bandwidth-bound, so the older, wider 7900 XTX decodes faster per token despite the newer card's compute advantage; the 9070 XT wins on prefill, on FP8/INT8 throughput, and on fitting a larger model in 16 GB. For LLM work the deciding question is which side of the roofline the workload sits on, and at 640 GB/s this card is 25% below an RTX 4090's 1008 GB/s while also having less VRAM - a combination that makes it a poor value-for-decode card and a decent prefill/preprocessing card.

Cross-references