CoreWeave GB300 NVL72, MLPerf Inference v6.1 Server: Llama 2 70B across a full 72-GPU rack (18 nodes) under the Server latency constraint
Fields
benchmarks/bench-mlperf-v6-1-coreweave-gb300-nvl72-llama2-70b-serverNotes
Second-largest Llama result in v6.1. Note the rack-scale Server discount is LARGER here than on GB200: 1136100 Offline to 944902.14 Server is -16.8%, against GB200's +1.9% in the other direction. Same submitters, same harness, same scenario pair, adjacent hardware generations - so the sign and size of the Offline-vs-Server relationship is not a stable property of either the platform or the scenario. It is a property of the load shape at that particular scale point, and it is exactly why an MLPerf comparison that does not state the scenario is not a comparison. INTERCONNECT IDS FILLED 2026-10-04: interconnect_ids was empty; it now carries the interconnect list of the accelerator record(s) this run names (nvidia-b300). BASIS AND ITS LIMITS, stated because this field is easy to over-read: it records the FABRIC PRESENT IN THE HARDWARE CONFIGURATION, which is how every previously-filled record in this repo reads it, not traffic measured over that fabric. The clearest evidence for that convention is that single-GPU records already carry a scale-up fabric here - trtllm-llama31-8b-fp8-h100-1k1k-tps is 1x H100 at TP=1 and carries ['nvlink-4','nvswitch-4'] - and that host-link-only records carry a PCIe value (arc-pro-b70-mlperf-v6-1-llama2-70b-offline-tokens carries ['pcie-gen5'] on 4x Arc Pro B70, which has no GPU-to-GPU fabric at all). So a value here does NOT mean the interconnect was exercised by this particular workload, and must not be cited as evidence that it was. Whether the run actually crossed that fabric is a question about TP/EP/PP size, which this repo records in methodology, not here. NOT INVENTED: nothing was filled where the accelerator record itself carries no interconnect, so this field stays empty for any part whose own record has none - which is the honest state for a single-socket Apple sOC and for parts whose vendor publishes no host interface.