NVIDIA B300 (Blackwell Ultra)

CORRECTED 2026-10-03: was vram_gb 288, which matches no figure in NVIDIA's Blackwell Ultra datasheet. The datasheet's per-GPU row 'GPU Memory | Bandwidth' prints '279 GB HBM3E | 8 TB/s' for the GB300 NVL72 column and '270 GB HBM3E | 7.7 TB/s' for the HGX B300 column; 288 is the MI355X/MI350X capacity, not this part's. Now 279 (the GB300 NVL72 figure, consistent with this record's tdp_w 1400 which is also the NVL72 column's 'Configurable up to 1,400 W'). The HGX B300 column would instead be 270 GB and 7.7 TB/s at up to 1,100 W. NVIDIA's GB300 NVL72 product page independently corroborates the aggregate: 'Fast Memory 37 TB' across 72 GPUs = 514 GB per GPU of usable-package memory, which is a different quantity again (fast memory excludes some capacity and is rounded); the per-die HBM3E figure of 279 GB is the datasheet number. Bandwidth 8 TB/s: 8192-bit x 8 Gb/s per pin / 8 = 8,192 GB/s, not 8,000. The correct per-pin rate is 7.81 Gbps (8000 x 8 / 8192).

CORRECTED 2026-10-03: vram_gb 288 -> 279. CORRECTED 2026-10-03: re-read the Blackwell Ultra datasheet PDF directly (nor-tech.com copy of NVIDIA's document, source nv-blackwell-ultra-datasheet) and the per-row dense/sparse basis is now annotated row-by-row instead of only in prose. Three findings. (1) The FP4 row's 15,000 TFLOPS dense is CORRECT and rests on a rule that is the OPPOSITE of every other row on both this sheet and the B200 sheet: footnote 1 here reads 'Specification in Sparse | Dense' so 20|15 is sparse-then-dense left to right. (2) The datasheet's per-GPU table has TWO columns - GB300 NVL72 (279GB/8TB/s, up to 1,400W) and HGX B300 (270GB/7.7TB/s, up to 1,100W) - and this single record mixes figures from both (288GB and 1400W from the NVL72 column, but 7.7 TB/s's sibling framing and tdp 1400 from NVL72). vram_gb 288 and tdp_w 1400 are NVL72-column figures; the HGX B300 column says 270GB and 1100W. Both are now stated per row rather than blended. (3) INT8 330/307 TOPS is inconsistent with the FP8 row on the same table by ~30x and is carried as an explicit two-reading dispute rather than resolved by preference. The record stays contested. AUDIT CORRECTION (FP4 ROW): the Blackwell Ultra datasheet prints FP4 as '20 PFLOPS | 15 PFLOPS' under footnote 1, 'Specification in Sparse | Dense' - a SPARSE|DENSE pair, NOT the sparse-only convention used by the other rows. Dense FP4 is therefore 15 PFLOPS, not 10. The stored 9,000 TFLOPS matched neither column and has been corrected to 15,000 (the GB300 NVL72 column; the HGX B300 column prints '18 PFLOPS | 14 PFLOPS', i.e. 14 PFLOPS dense). By contrast the FP8/FP6 row '10 PFLOPS | 9 PFLOPS' carries footnote 2, 'Specification in sparse. Dense is one-half', so the 5,000/4,500 dense values there are correct. AUDIT CORRECTION: the dense/sparse flag on the tensor rows was inverted. FP16 2500 / FP8 5000 TFLOPS are DENSE; the datasheet prints 5/10 PFLOPS 'Specifications in sparse. Dense is one-half of the sparse spec shown.' These rows were previously flagged dense:false, which wrongly told a reader they were sparse. The stored numbers are correct dense values. CONTESTED / transcription-damaged source. The Blackwell Ultra datasheet prints per-GPU: FP4 '20 PFLOPS | 15 PFLOPS', FP8/FP6 '10 PFLOPS | 9 PFLOPS', INT8 '330 TOPS | 307 TOPS', FP16/BF16 '5 PFLOPS | 4.5 PFLOPS', TF32 '2.5 PFLOPS | 2.2 PFLOPS', FP32 '80 TFLOPS | 75 TFLOPS', FP64 '1.3 TFLOPS | 1.2 TFLOPS'. Two columns, one presumably GB300 NVL72 and one HGX B300. Same 'dense is one-half of sparse' rule as Blackwell, so dense FP4 = 10 and 7.5 PFLOPS. FLAGGED: (1) the INT8 row reads 330/307 TOPS, which is roughly 30x below the ~10 PFLOPS the other AI rows imply - consistent with a broken text-layer extraction - INT8 should track FP8 at ~10,000 TOPS sparse; this looks like a broken text-layer extraction (possibly '10 POPS'). INT8 IS THEREFORE NOT RECORDED in flops. (2) The two rows above both list precision fp8 (the sheet has separate FP8 and FP8/FP6 rows); they are kept separate to preserve the two printed columns. (3) B300's headline gain over B200 is memory (288GB vs 186GB, +1.5x) and attention-layer acceleration (2x) and PCIe Gen6 (256 GB/s), NOT raw Tensor FLOPS - FP4/FP8/FP16/TF32 are identical to B200 per GPU. tdp_w 1400 is the GB300 NVL72 'configurable up to 1,400W' figure (HGX B300 is 1,100W). vram_gb 288 chosen from the GB300 column; the HGX B300 column is 270GB. Reseller-hosted copy of NVIDIA's PDF. AUDIT CORRECTION: this note previously claimed the record contains an 'other' (FP64) row. IT DOES NOT - the flops list has no 'other' entry, because the Blackwell Ultra sheet prints FP64/FP64 Tensor Core as '1.3 TFLOPS | 1.2 TFLOPS' (footnote 1, Sparse|Dense, so 1.2 TFLOPS dense) and the schema's precision enum has no fp64 member, so no row was created. Treat FP64 on B300 as 1.2 TFLOPS dense. Also note this is a REMARKABLE REGRESSION from B200's 40 TFLOPS: Blackwell Ultra cuts FP64 by ~30x to satisfy export-control thresholds, which is why it cannot be slotted into HPC double-precision work. COLUMN-MIXING ERROR, CORRECTED 2026-10-05. This record previously carried the GB300 NVL72 column's figures - 279 GB, 8.0 TB/s, 1400 W - while being named B300, which is the HGX B300. The HGX B300 column prints 270 GB and 7.7 TB/s at 1100 W. The compute rows are correct for this part and were left alone; only the three memory/power fields were the wrong column. nvidia-gb300 keeps 279/8000/1400, which is right for it. The compute rows were independently re-confirmed against the Blackwell Ultra datasheet this pass: FP32 80, TF32 1250, BF16/FP16 2500, FP8 5000 and 4500, FP4 15000 dense. The FP4 figure is 15000 because on the ULTRA sheet that row carries footnote 1 ('Specification in Sparse | Dense'), a labelled PAIR reading 20 | 15 - so 15 is the dense half. The earlier correction to 15000 was right and the original 9000 was wrong. This is the OPPOSITE convention to the B200 sheet, where FP4 carries footnote 2 and dense is 9. Same product family, opposite footnote, which is why this row was wrong twice before it was right.