NVIDIA H100 Tensor Core GPU datasheet (Mar 2023 revision)
spec-sheet
Fields
id
sources/acc2-nv-h100-datasheet-2023Publisher
NVIDIA (PDF hosted on a third-party Webflow CDN)
Kind
spec-sheet
Published
2023-03
Accessed
2026-10-03
notes
Fetched and text-extracted in full on 2026-10-03. Page 2 'Technical Specifications' table carries THREE columns - H100 SXM / H100 PCIe / H100 NVL - and two critical footnotes: '1 Preliminary specifications. May be subject to change. Specifications shown for 2x H100 NVL PCIe cards paired with NVLink Bridge.' and '2 With sparsity.' EVERY TF32/BF16/FP16/FP8/INT8 number in that table is therefore a SPARSE figure. The NVL column is a 2x-paired aggregate (188GB, 7.8TB/s aggregate HBM bandwidth), NOT a per-card number.
Notes
Fetched and text-extracted in full on 2026-10-03. Page 2 'Technical Specifications' table carries THREE columns - H100 SXM / H100 PCIe / H100 NVL - and two critical footnotes: '1 Preliminary specifications. May be subject to change. Specifications shown for 2x H100 NVL PCIe cards paired with NVLink Bridge.' and '2 With sparsity.' EVERY TF32/BF16/FP16/FP8/INT8 number in that table is therefore a SPARSE figure. The NVL column is a 2x-paired aggregate (188GB, 7.8TB/s aggregate HBM bandwidth), NOT a per-card number.
Cross-references
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