Bandwidth basis
HBM2e at 5,120-bit giving the 2,000 GB/s peak printed in the product brief (nv-h100-pcie-product-brief); memory clock 1593 MHz as stated in Table 2.
Peak FLOPS
precisionfp64tflops26denseyesvendor_claimyessource_idnv-h100-datasheetnotes—basisvendor-spec-sheetbasis_detailH100 datasheet PCIe column, 'FP64 26 TFLOPS'.precisionfp32tflops51denseyesvendor_claimyessource_idnv-h100-datasheetbasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own fp32 for NVIDIA H100 PCIe (source of record: 'NVIDIA H100 Tensor Core GPU datasheet (H100 SXM / PCIe / NVL)', kind: spec-sheet). Recorded dense:true as printed.precisiontf32tflops378denseyesvendor_claimyessource_idnv-h100-datasheetbasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own tf32 for NVIDIA H100 PCIe (source of record: 'NVIDIA H100 Tensor Core GPU datasheet (H100 SXM / PCIe / NVL)', kind: spec-sheet). Recorded dense:true as printed.precisionbf16tflops756.5denseyesvendor_claimyessource_idnv-h100-datasheetbasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own bf16 for NVIDIA H100 PCIe (source of record: 'NVIDIA H100 Tensor Core GPU datasheet (H100 SXM / PCIe / NVL)', kind: spec-sheet). Recorded dense:true as printed.precisionfp16tflops756.5denseyesvendor_claimyessource_idnv-h100-datasheetbasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own fp16 for NVIDIA H100 PCIe (source of record: 'NVIDIA H100 Tensor Core GPU datasheet (H100 SXM / PCIe / NVL)', kind: spec-sheet). Recorded dense:true as printed.precisionfp8tflops1,513denseyesvendor_claimyessource_idnv-h100-datasheetbasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own fp8 for NVIDIA H100 PCIe (source of record: 'NVIDIA H100 Tensor Core GPU datasheet (H100 SXM / PCIe / NVL)', kind: spec-sheet). Recorded dense:true as printed.precisionint8tflops1,513denseyesvendor_claimyessource_idnv-h100-datasheetbasisvendor-spec-sheetbasis_detailTranscribed from the vendor's own int8 for NVIDIA H100 PCIe (source of record: 'NVIDIA H100 Tensor Core GPU datasheet (H100 SXM / PCIe / NVL)', kind: spec-sheet). Recorded dense:true as printed.
notes
CORRECTED 2026-10-03: AUDIT 2026-10-03 (flag semantics verified, no value changed): re-read NVIDIA's H100 datasheet page-2 'Technical Specifications' table directly (source acc2-nv-h100-datasheet-2023, footnote 2 'With sparsity'). The H100 PCIe column prints TF32 756, BFLOAT16 1,513, FP16 1,513, FP8 3,026, INT8 3,026 TOPS - ALL SPARSE - so dense is exactly half: 378 / 756.5 / 756.5 / 1,513 / 1,513. Every value stored here already matched the dense figure and every dense flag is correct; this row set is now confirmed against the primary PDF rather than the product brief. One trap worth keeping in view: because footnote 2 applies to the whole table, the FP64 / FP32 / FP64-Tensor rows are the only numbers in that table that are NOT sparsity-footnoted, which is why those three are recorded as-is and the seven tensor rows are halved. AUDIT CORRECTION: the dense/sparse flag on the tensor rows was inverted. FP16 756.5 / FP8 1513 TFLOPS are DENSE; NVIDIA prints 1,513/3,026 'With sparsity'. These rows were previously flagged dense:false, which wrongly told a reader they were sparse. The stored numbers are correct dense values. CRITICAL: datasheet prints 756 TFLOPS TF32 and 1,513 BF16/FP16 and 3,026 FP8/INT8, all WITH SPARITY; dense is half (378 / 756.5 / 1,513). H100 PCIe is memory-BANDWIDTH bound relative to SXM (2,000 GB/s HBM2e vs 3,350 GB/s HBM3) while Tensor compute drops only ~24% - so at batch 1 decode the PCIe card is noticeably slower than SXM despite similar paper FLOPS. tdp_w 350 is the datasheet's '300-350W configurable' default; the product brief shows a 450W/600W cable mode capped at 350W max. Two cards bridge over NVLink at 600 GB/s. The 'other' row is FP64 26 TFLOPS (dense) - this schema's precision enum has no fp64 member.