AMD Instinct MI325X / MI350X: Passive OAM cooling makes direct-to-chip liquid cooling mandatory at 1000 W TBP

NEGATIVE, DELIBERATELY NOT STRUCTURAL: this is a quote-only channel - no price and no lead time is published on any page, checked 2026-10-04 per source spl-negative-no-oem-publishes-lead-time. The lead time exists inside a sales conversation; it is simply not printed. Contrast with the on-demand cloud records, where null means the concept does not apply.

EAR 3A090.a / 3A090.b (advanced-computing ICs) + EAR 742.6(a)(6)(iii)(A) (D:5/Macau end-user and ultimate-parent) + EAR 744.23 (Entity List screening) + EAR 744.6 (Unverified/MEU lists)

LAYER 1, EXPORT LICENCE: under the Jan 2026 BIS rule 91 FR 1684 (effective 2026-01-15) the license review policy for advanced-computing commodities with TPP < 21,000 AND total DRAM bandwidth < 6,500 GB/s - the NVIDIA H200 and AMD MI325X are the rule's named examples - moved from PRESUMPTION OF DENIAL to CASE-BY-CASE REVIEW, but only for exports FROM THE UNITED STATES to end users located in China or Macau, and only against six exporter certifications filed via SNAP-R before shipment: (1) items below the thresholds with the count of units shipped in the US; (2) sufficient US supply, judged 'taking into account normal lead times'; (3) no diversion of global foundry capacity away from US end users; (4) aggregate China+Macau shipments <= 50% of total US end-use shipments of that product; (5) no end-user or use prohibition; (6) the consignee runs rigorous KYC. Every shipment must then pass a qualified third-party testing lab - US-headquartered, not controlled by a D:5/Macau entity, no ownership stake in any party, qualification revocable by BIS at any time - verifying TPP, total DRAM bandwidth, interconnect bandwidth and copackaged DRAM capacity. Reexports and in-country transfers of the same chips to China/Macau REMAIN PRESUMPTION OF DENIAL. LAYER 2, END-USER AND PARENT SCREENING: per BIS guidance of 2026-05-31 a licence is required where the consignee is HEADQUARTERED in Country Group D:5 (15 CFR part 740 supplement no. 1) or Macau OR whose ULTIMATE PARENT COMPANY is so headquartered - even when the consignee itself sits outside D:5/Macau. The requirement sits at EAR 742.6(a)(6)(iii)(A) for destinations outside the US, with an exception available only under the license exception at 740.2(a)(9)(ii). The destination country alone therefore never answers the question; screen the parent. LAYER 3, REMAINING LIMITS: exports to D:5/Macau-headquartered OR -parented entities stay PRESUMPTION OF DENIAL wherever the buyer sits, and the AI Diffusion Rule that would have set a country-tier structure on who could lawfully buy what was RESCINDED on 2025-05-13 and is not being enforced, so any recorded status rests on the instruments named here rather than on tiering.

THE AMD HALF OF THE LIQUID-COOLING STORY, AND IT IS CLEANER AND HARDER THAN THE NVIDIA ONE. AMD's own product pages for both parts state, under Board Specifications, 'Cooling: Passive OAM', and under Requirements, 'Typical Board Power (TBP) 1000W (TBP)' for MI350X and 'Typical Board Power (TBP) 1000W Peak' for MI325X, with 'External Power Connectors 54V UBB' for both. PASSIVE OAM IS THE DECISIVE SPECIFIER AND IT IS NOT SUBTLE: a passive OAM module has no integrated heat sink and no fan of its own, so it physically cannot reject 1000 W unaided. It requires a cold plate bonded to it in the host chassis, which requires a liquid loop in the server, which requires a CDU or facility liquid in the rack. So the same hard procurement fact that applies to GB200 NVL72 applies here, and it applies at 1000 W per module - i.e. an 8-module MI350X platform is an ~8 kW GPU load that is nonetheless a LIQUID-COOLED system, not an air-cooled one. This is the trap in the MI300-series line: the parts are usually discussed by memory capacity and FLOPs, and the cooling requirement is the fact most likely to be missed, because '1 TB of HBM3E' says nothing about needing a wet loop. COMPARISON WORTH KNOWING, RECORDED AS A CONTESTED PAIR RATHER THAN RECONCILED: AMD's own MI325X collateral footnotes 'the NVidia Blackwell HGX B100 (192GB) 700W GPU accelerator' and 'HGX B200 (192GB)' - i.e. AMD quotes 700 W for B200 in its comparison footnotes, while NVIDIA's Blackwell datasheet publishes Max TDP 'Configurable up to 1,000 W' for HGX B200 and up to 1,200 W for GB200 NVL72/NVL4. The split is knowable: AMD is quoting a nominal sustained figure and NVIDIA is publishing a configurable ceiling. Anyone doing a cross-vendor power budget should ask which they are holding, because a 700 W assumption against a 1,000-1,200 W reality is a 40-70% sizing error. GENERATION NOTE: MI325X and MI350X share the identical 1000 W TBP and Passive OAM envelope, so they fall in the same procurement bucket - a host validated for one is thermally valid for the other, and there is no cooling-requirement change across the CDNA3 to CDNA4 transition. Note also '54V UBB' is the same 50-51V-class rack busbar distribution NVIDIA's GB200 power shelves convert down to, so a facility designed for one vendor's rack-scale system has infrastructure that is partly relevant to the other - though the manifold and cold-plate mechanics are not interchangeable. EXPORT CONTROL (2026-10-04, mechanism-level; sources spl-eccn-3a090-ccl, spl-bis-2026-01-advanced-computing-case-by-case, spl-bis-2026-05-d5-guidance): these parts classify under ECCN 3A090.a/.b, whose thresholds are 'total processing performance' (TPP) >= 4800, or TPP >= 1600 with performance density >= 5.92 (the .b band is TPP 2400-4800 with performance density 1.6-5.92, or TPP >= 1600 with performance density 3.2-5.92). The mechanism has THREE layers and all three must be cleared, not just one: (a) LICENSE FOR EXPORT FROM THE US - controlled by the January 2026 rule (91 FR 1684, effective 2026-01-15), which moved TPP < 21,000 AND total DRAM bandwidth < 6,500 GB/s parts from presumption of denial to CASE-BY-CASE REVIEW, but only for exports from the US to end users in China/Macau, and only against six exporter certifications - US supply sufficiency judged 'taking into account normal lead times', no diversion of foundry capacity away from US end users, aggregate China+Macau shipments capped at 50% of US end-use shipments, no end-user prohibition, consignee KYC procedures, and prior verification by a qualified third-party US testing lab of TPP, total DRAM bandwidth, interconnect bandwidth and copackaged DRAM capacity; (b) END-USER AND PARENT-COMPANY SCREENING under 742.6(a)(6)(iii)(A) - per BIS guidance of 2026-05-31 a licence is required where the consignee is HEADQUARTERED in Country Group D:5 or Macau OR ITS ULTIMATE PARENT is so headquartered, EVEN IF the consignee itself is outside D:5/Macau, which means the destination country alone never answers the question; (c) THE LIMITS THAT REMAIN - reexports and in-country transfers of the same chips to China/Macau remain PRESUMPTION OF DENIAL, and exports to D:5/Macau-headquartered or -parented entities remain presumption of denial wherever the buyer sits. The Jan-2025 AI Diffusion Rule was rescinded and not enforced from 2025-05-13, but that rescission did not remove (a) or (b). THE OUTCOME THAT DECIDES A PROCUREMENT (source spl-nvda-10q-fy2027q2-h200-licence-outcome): a licence is necessary but demonstrably NOT sufficient. NVIDIA has been granted H200 licences under exactly this regime and reported that those sales were 'restricted by the PRC government', that it made 'a fraction of the allowed shipments', and that both those shipments and all Data Center Hopper shipments to China in the quarter were LESS THAN 1% of Data Center revenue - alongside a $0.4 billion H200 excess-inventory and purchase-obligation charge. The licences additionally require US inspection before shipment, which attracts a 25% tariff on importation into the US that NVIDIA states it cannot pass on. So a destination-market import approval, not the US licence, was the binding constraint. LEAD TIME: null. AMD publishes no lead time in weeks for MI325X/MI350X/MI355X on any page and this is a quote-only oem-direct channel, so a number would be invented. Worth pairing with what IS documented for this part in the export direction: MI325X is the second part BIS named by hand in the January 2026 rule (91 FR 1684) as a TPP < 21,000 / DRAM bandwidth < 6,500 GB/s device eligible for case-by-case review - so this part's COMPLIANCE path is published while its DELIVERY path is not, which is a fair summary of what a buyer can plan around at AMD. NVIDIA's disclosure is the contrast case: $95.2bn of purchase and supply/capacity obligations substantially payable through FY2027 bounds its horizon in quarters (source spl-nvda-10k-fy2026-supply-commitments). A rival publishing nothing is a procurement risk, not a shorter lead time. Probe log in source spl-negative-no-oem-publishes-lead-time.